Searched refs:TG1_T0_LEVEL_INTR_SOURCE (Results 1 – 10 of 10) sorted by relevance
44 #define TG1_T0_LEVEL_INTR_SOURCE 34 macro
28 #define TG1_T0_LEVEL_INTR_SOURCE 18 /* TIMER_GROUP1, TIMER0, level */ macro
64 #define TG1_T0_LEVEL_INTR_SOURCE 54 /* interrupt of TIMER_GROUP1, TIMER0, level*/ macro
29 #define TG1_T0_LEVEL_INTR_SOURCE 19 /* TIMER_GROUP1, TIMER0, level */ macro
59 #define TG1_T0_LEVEL_INTR_SOURCE 53 /* interrupt of TIMER_GROUP1, TIMER0, EDGE*/ macro
118 interrupts = <TG1_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
248 interrupts = <TG1_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
288 interrupts = <TG1_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
445 interrupts = <TG1_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
437 interrupts = <TG1_T0_LEVEL_INTR_SOURCE IRQ_DEFAULT_PRIORITY 0>;
