Searched +full:wovcro +full:- +full:supported (Results 1 – 9 of 9) sorted by relevance
/Zephyr-latest/dts/bindings/clock/ |
D | intel,adsp-shim-clkctl.yaml | 2 # SPDX-License-Identifier: Apache-2.0 6 compatible: "intel,adsp-shim-clkctl" 9 adsp-clkctl-clk-wovcro: 12 Index of WOVCRO clock encoding in the encoding array (if wovcro-supported is true). 14 adsp-clkctl-clk-lpro: 18 adsp-clkctl-clk-hpro: 22 adsp-clkctl-clk-ipll: 26 adsp-clkctl-freq-enc: 31 adsp-clkctl-freq-mask: 35 adsp-clkctl-freq-default: [all …]
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/Zephyr-latest/soc/intel/intel_adsp/common/include/ |
D | adsp_clk.h | 4 * SPDX-License-Identifier: Apache-2.0 26 * @return 0 on success, -EINVAL if freq_idx is not valid 59 #define ADSP_CPU_CLOCK_FREQ_WOVCRO ADSP_CPU_CLOCK_FREQ(wovcro) 84 /** @brief Check if clock source is supported 88 * @return true if clock source is supported
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/Zephyr-latest/dts/xtensa/intel/ |
D | intel_adsp_cavs25_tgph.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 12 #address-cells = <1>; 13 #size-cells = <0>; 17 compatible = "cdns,tensilica-xtensa-lx6"; 19 cpu-power-states = <&d3>; 20 i-cache-line-size = <64>; 21 d-cache-line-size = <64>; 26 compatible = "cdns,tensilica-xtensa-lx6"; 28 cpu-power-states = <&d3>; 31 power-states { [all …]
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D | intel_adsp_cavs25.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 12 #address-cells = <1>; 13 #size-cells = <0>; 17 compatible = "cdns,tensilica-xtensa-lx6"; 19 cpu-power-states = <&d3>; 20 i-cache-line-size = <64>; 21 d-cache-line-size = <64>; 26 compatible = "cdns,tensilica-xtensa-lx6"; 28 cpu-power-states = <&d3>; 33 compatible = "cdns,tensilica-xtensa-lx6"; [all …]
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D | intel_adsp_ace20_lnl.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 12 #address-cells = <1>; 13 #size-cells = <0>; 17 compatible = "cdns,tensilica-xtensa-lx7"; 19 cpu-power-states = <&d0i3 &d3>; 20 i-cache-line-size = <64>; 21 d-cache-line-size = <64>; 26 compatible = "cdns,tensilica-xtensa-lx7"; 28 cpu-power-states = <&d0i3 &d3>; 33 compatible = "cdns,tensilica-xtensa-lx7"; [all …]
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D | intel_adsp_ace30_ptl.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 12 #address-cells = <1>; 13 #size-cells = <0>; 17 compatible = "cdns,tensilica-xtensa-lx7"; 19 cpu-power-states = <&d0i3 &d3>; 20 i-cache-line-size = <64>; 21 d-cache-line-size = <64>; 26 compatible = "cdns,tensilica-xtensa-lx7"; 28 cpu-power-states = <&d0i3 &d3>; 33 compatible = "cdns,tensilica-xtensa-lx7"; [all …]
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D | intel_adsp_ace30.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 12 #address-cells = <1>; 13 #size-cells = <0>; 17 compatible = "cdns,tensilica-xtensa-lx7"; 19 cpu-power-states = <&d0i3 &d3>; 20 i-cache-line-size = <64>; 21 d-cache-line-size = <64>; 26 compatible = "cdns,tensilica-xtensa-lx7"; 28 cpu-power-states = <&d0i3 &d3>; 33 compatible = "cdns,tensilica-xtensa-lx7"; [all …]
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D | intel_adsp_ace15_mtpm.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 12 #address-cells = <1>; 13 #size-cells = <0>; 17 compatible = "cdns,tensilica-xtensa-lx7"; 19 cpu-power-states = <&d0i3 &d3>; 20 i-cache-line-size = <64>; 21 d-cache-line-size = <64>; 26 compatible = "cdns,tensilica-xtensa-lx7"; 28 cpu-power-states = <&d3>; 33 compatible = "cdns,tensilica-xtensa-lx7"; [all …]
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/Zephyr-latest/doc/releases/ |
D | release-notes-3.2.rst | 13 * Added support for :ref:`bin-blobs` (also see :ref:`west-blobs`). 15 * Converted all supported boards from ``pinmux`` to :ref:`pinctrl-guide`. 31 * CVE-2022-2993: Under embargo until 2022-11-03 33 * CVE-2022-2741: Under embargo until 2022-10-14 56 This definition can be used by third-party code to compile code conditional 58 Therefore, any third-party code integrated using the Zephyr build system will 91 changed from ``-ENETDOWN`` to ``-ENETUNREACH``. A return value of ``-ENETDOWN`` now indicates 129 * Removed support for configuring the CAN-FD maximum DLC value via Kconfig 156 valid for specific bindings to specify like :dtcompatible:`gpio-leds` and 157 :dtcompatible:`fixed-partitions`. [all …]
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