Lines Matching +full:wovcro +full:- +full:supported
4 * SPDX-License-Identifier: Apache-2.0
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "cdns,tensilica-xtensa-lx7";
19 cpu-power-states = <&d0i3 &d3>;
20 i-cache-line-size = <64>;
21 d-cache-line-size = <64>;
26 compatible = "cdns,tensilica-xtensa-lx7";
28 cpu-power-states = <&d0i3 &d3>;
33 compatible = "cdns,tensilica-xtensa-lx7";
35 cpu-power-states = <&d0i3 &d3>;
40 compatible = "cdns,tensilica-xtensa-lx7";
42 cpu-power-states = <&d0i3 &d3>;
47 compatible = "cdns,tensilica-xtensa-lx7";
49 cpu-power-states = <&d0i3 &d3>;
52 power-states {
54 compatible = "zephyr,power-state";
55 power-state-name = "runtime-idle";
56 min-residency-us = <200>;
57 exit-latency-us = <100>;
63 compatible = "zephyr,power-state";
64 power-state-name = "soft-off";
65 min-residency-us = <0>;
66 exit-latency-us = <0>;
74 compatible = "mmio-sram";
80 compatible = "mmio-sram";
86 compatible = "mmio-sram";
90 sysclk: system-clock {
91 compatible = "fixed-clock";
92 clock-frequency = <38400000>;
93 #clock-cells = <0>;
97 compatible = "intel,adsp-shim-clkctl";
98 adsp-clkctl-clk-wovcro = <0>;
99 adsp-clkctl-clk-ipll = <1>;
100 adsp-clkctl-freq-enc = <0xc 0x4>;
101 adsp-clkctl-freq-mask = <0x0 0x0>;
102 adsp-clkctl-freq-default = <1>;
103 adsp-clkctl-freq-lowest = <0>;
104 wovcro-supported;
107 audioclk: audio-clock {
108 compatible = "fixed-clock";
109 clock-frequency = <24576000>;
110 #clock-cells = <0>;
113 pllclk: pll-clock {
114 compatible = "fixed-clock";
115 clock-frequency = <96000000>;
116 #clock-cells = <0>;
120 compatible = "intel,adsp-imr";
122 block-size = <0x1000>;
123 zephyr,memory-region = "IMR1";
127 compatible = "intel,adsp-shim";
134 compatible = "intel,adsp-l1ccap";
139 compatible = "intel,adsp-l1ccfg";
144 compatible = "intel,adsp-l1pcfg";
149 compatible = "intel,adsp-hsbcap";
154 compatible = "intel,adsp-lsbpm";
159 compatible = "intel,adsp-hsbpm";
164 compatible = "cdns,xtensa-core-intc";
166 interrupt-controller;
167 #interrupt-cells = <3>;
171 compatible = "intel,adsp-hda-dmic-cap";
176 dmic0: dai-dmic0@10100 {
177 compatible = "intel,dai-dmic";
182 interrupt-parent = <&ace_intc>;
183 zephyr,pm-device-runtime-auto;
186 dmic1: dai-dmic1@10100 {
187 compatible = "intel,dai-dmic";
192 interrupt-parent = <&ace_intc>;
193 zephyr,pm-device-runtime-auto;
197 compatible = "intel,adsp-dmic-vss";
203 compatible = "intel,ssp-sspbase";
208 compatible = "intel,adsp-hda-ssp-cap";
215 #address-cells = <1>;
216 #size-cells = <0>;
221 interrupt-parent = <&ace_intc>;
224 dma-names = "tx", "rx";
225 ssp-index = <0>;
229 compatible = "intel,ssp-dai";
230 power-domains = <&io0_domain>;
231 zephyr,pm-device-runtime-auto;
239 #address-cells = <1>;
240 #size-cells = <0>;
245 interrupt-parent = <&ace_intc>;
248 dma-names = "tx", "rx";
249 ssp-index = <1>;
253 compatible = "intel,ssp-dai";
254 power-domains = <&io0_domain>;
255 zephyr,pm-device-runtime-auto;
263 #address-cells = <1>;
264 #size-cells = <0>;
269 interrupt-parent = <&ace_intc>;
272 dma-names = "tx", "rx";
273 ssp-index = <2>;
277 compatible = "intel,ssp-dai";
278 power-domains = <&io0_domain>;
279 zephyr,pm-device-runtime-auto;
286 compatible = "intel,adsp-mem-window";
291 read-only;
295 compatible = "intel,adsp-mem-window";
301 compatible = "intel,adsp-mem-window";
307 compatible = "intel,adsp-mem-window";
310 read-only;
314 compatible = "intel,adsp-idc";
317 interrupt-parent = <&ace_intc>;
321 compatible = "intel,adsp-dfpmcch";
326 compatible = "intel,adsp-dfpmccu";
330 compatible = "intel,adsp-power-domain";
331 bit-position = <15>;
332 #power-domain-cells = <0>;
335 compatible = "intel,adsp-power-domain";
336 bit-position = <12>;
337 #power-domain-cells = <0>;
340 compatible = "intel,adsp-power-domain";
341 bit-position = <9>;
342 #power-domain-cells = <0>;
345 compatible = "intel,adsp-power-domain";
346 bit-position = <8>;
347 #power-domain-cells = <0>;
350 compatible = "intel,adsp-power-domain";
351 bit-position = <6>;
352 #power-domain-cells = <0>;
355 compatible = "intel,adsp-power-domain";
356 bit-position = <5>;
357 #power-domain-cells = <0>;
362 compatible = "intel,adsp-tts";
368 compatible = "intel,ace-rtc-counter";
374 compatible = "intel,ace-timestamp";
379 compatible = "intel,ace-art-counter";
384 compatible = "intel,adsp-hda-host-out";
385 #dma-cells = <1>;
387 dma-channels = <9>;
388 dma-buf-addr-alignment = <128>;
389 dma-buf-size-alignment = <32>;
390 dma-copy-alignment = <16>;
391 power-domains = <&hst_domain>;
392 zephyr,pm-device-runtime-auto;
394 interrupt-parent = <&ace_intc>;
399 compatible = "intel,adsp-hda-host-in";
400 #dma-cells = <1>;
402 dma-channels = <11>;
403 dma-buf-addr-alignment = <128>;
404 dma-buf-size-alignment = <32>;
405 dma-copy-alignment = <16>;
406 power-domains = <&hst_domain>;
407 zephyr,pm-device-runtime-auto;
409 interrupt-parent = <&ace_intc>;
414 compatible = "intel,adsp-host-ipc";
418 interrupt-parent = <&ace_intc>;
422 compatible = "intel,adsp-hda-link-out";
423 #dma-cells = <1>;
425 dma-channels = <9>;
426 dma-buf-addr-alignment = <128>;
427 dma-buf-size-alignment = <32>;
428 dma-copy-alignment = <16>;
429 power-domains = <&hub_ulp_domain>;
430 zephyr,pm-device-runtime-auto;
435 compatible = "intel,adsp-hda-link-in";
436 #dma-cells = <1>;
438 dma-channels = <11>;
439 dma-buf-addr-alignment = <128>;
440 dma-buf-size-alignment = <32>;
441 dma-copy-alignment = <16>;
442 power-domains = <&hub_ulp_domain>;
443 zephyr,pm-device-runtime-auto;
447 /* This is actually an array of per-core designware
453 compatible = "intel,ace-intc";
455 interrupt-controller;
456 #interrupt-cells = <3>;
458 num-irqs = <28>;
459 interrupt-parent = <&core_intc>;
463 compatible = "intel,adsp-mtl-tlb";
465 paddr-size = <12>;
466 exec-bit-idx = <14>;
467 write-bit-idx= <15>;
471 compatible = "intel,adsp-timer";
477 #address-cells = <1>;
478 #size-cells = <0>;
481 compatible = "intel,hda-dai";
482 power-domains = <&io0_domain>;
483 zephyr,pm-device-runtime-auto;
488 compatible = "intel,hda-dai";
489 power-domains = <&io0_domain>;
490 zephyr,pm-device-runtime-auto;
495 compatible = "intel,hda-dai";
496 power-domains = <&io0_domain>;
497 zephyr,pm-device-runtime-auto;
502 compatible = "intel,hda-dai";
503 power-domains = <&io0_domain>;
504 zephyr,pm-device-runtime-auto;
509 compatible = "intel,hda-dai";
510 power-domains = <&io0_domain>;
511 zephyr,pm-device-runtime-auto;
516 compatible = "intel,hda-dai";
517 power-domains = <&io0_domain>;
518 zephyr,pm-device-runtime-auto;
523 compatible = "intel,hda-dai";
524 power-domains = <&io0_domain>;
525 zephyr,pm-device-runtime-auto;
530 compatible = "intel,hda-dai";
531 power-domains = <&io0_domain>;
532 zephyr,pm-device-runtime-auto;
537 compatible = "intel,hda-dai";
538 power-domains = <&io0_domain>;
539 zephyr,pm-device-runtime-auto;
544 compatible = "intel,hda-dai";
545 power-domains = <&io0_domain>;
546 zephyr,pm-device-runtime-auto;
551 compatible = "intel,hda-dai";
552 power-domains = <&io0_domain>;
553 zephyr,pm-device-runtime-auto;
558 compatible = "intel,hda-dai";
559 power-domains = <&io0_domain>;
560 zephyr,pm-device-runtime-auto;
565 compatible = "intel,hda-dai";
566 power-domains = <&io0_domain>;
567 zephyr,pm-device-runtime-auto;
572 compatible = "intel,hda-dai";
573 power-domains = <&io0_domain>;
574 zephyr,pm-device-runtime-auto;
579 compatible = "intel,hda-dai";
580 power-domains = <&io0_domain>;
581 zephyr,pm-device-runtime-auto;
586 compatible = "intel,hda-dai";
587 power-domains = <&io0_domain>;
588 zephyr,pm-device-runtime-auto;
593 compatible = "intel,hda-dai";
594 power-domains = <&io0_domain>;
595 zephyr,pm-device-runtime-auto;
600 compatible = "intel,hda-dai";
601 power-domains = <&io0_domain>;
602 zephyr,pm-device-runtime-auto;
607 compatible = "intel,hda-dai";
608 power-domains = <&io0_domain>;
609 zephyr,pm-device-runtime-auto;