| /Zephyr-latest/drivers/syscon/ |
| D | Kconfig | 1 # SYSCON configuration options
7 # SYSCON options
9 menuconfig SYSCON config
10 bool "System Controller (SYSCON) drivers"
12 SYSCON (System Controller) drivers. System controller node represents
16 platform-specific code, to acquire a reference to the syscon node and
19 if SYSCON
21 module = SYSCON
22 module-str = syscon
26 bool "Generic SYSCON (System Controller) driver"
[all …]
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| /Zephyr-latest/drivers/clock_control/ |
| D | clock_control_lpc11u6x.c | 17 static void syscon_power_up(struct lpc11u6x_syscon_regs *syscon, in syscon_power_up() argument
21 syscon->pd_run_cfg = (syscon->pd_run_cfg & ~bit) in syscon_power_up()
24 syscon->pd_run_cfg = syscon->pd_run_cfg | bit in syscon_power_up()
29 static void syscon_set_pll_src(struct lpc11u6x_syscon_regs *syscon, in syscon_set_pll_src() argument
32 syscon->sys_pll_clk_sel = src; in syscon_set_pll_src()
33 syscon->sys_pll_clk_uen = 0; in syscon_set_pll_src()
34 syscon->sys_pll_clk_uen = 1; in syscon_set_pll_src()
44 static void syscon_setup_pll(struct lpc11u6x_syscon_regs *syscon, in syscon_setup_pll() argument
51 syscon->sys_pll_ctrl = val; in syscon_setup_pll()
54 static bool syscon_pll_locked(struct lpc11u6x_syscon_regs *syscon) in syscon_pll_locked() argument
[all …]
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| D | clock_control_ast10x0.c | 11 #include <zephyr/drivers/syscon.h>
47 const struct device *syscon; member
54 const struct device *syscon = DEV_CFG(dev)->syscon; in aspeed_clock_control_on() local
68 syscon_write_reg(syscon, addr, BIT(clk_gate)); in aspeed_clock_control_on()
75 const struct device *syscon = DEV_CFG(dev)->syscon; in aspeed_clock_control_off() local
89 syscon_write_reg(syscon, addr, BIT(clk_gate)); in aspeed_clock_control_off()
97 const struct device *syscon = DEV_CFG(dev)->syscon; in aspeed_clock_control_get_rate() local
106 syscon_read_reg(syscon, CLK_SELECTION_REG4, ®); in aspeed_clock_control_get_rate()
117 syscon_read_reg(syscon, CLK_SELECTION_REG5, ®); in aspeed_clock_control_get_rate()
123 syscon_read_reg(syscon, CLK_SELECTION_REG4, ®); in aspeed_clock_control_get_rate()
[all …]
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| /Zephyr-latest/tests/drivers/syscon/src/ |
| D | main.c | 7 #include <zephyr/drivers/syscon.h>
13 uint8_t var_in_res0[DT_REG_SIZE(DT_NODELABEL(syscon))] __attribute((__section__(RES_SECT)));
15 ZTEST(syscon, test_size) in ZTEST() argument
17 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in ZTEST()
18 const size_t expected_size = DT_REG_SIZE(DT_NODELABEL(syscon)); in ZTEST()
27 ZTEST(syscon, test_out_of_bounds) in ZTEST() argument
29 const struct device *const dev = DEVICE_DT_GET(DT_NODELABEL(syscon)); in ZTEST()
32 zassert_equal(syscon_read_reg(dev, DT_REG_SIZE(DT_NODELABEL(syscon)), &val), -EINVAL); in ZTEST()
33 zassert_equal(syscon_write_reg(dev, DT_REG_SIZE(DT_NODELABEL(syscon)), val), -EINVAL); in ZTEST()
36 ZTEST(syscon, test_read) in ZTEST() argument
[all …]
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| /Zephyr-latest/drivers/reset/ |
| D | reset_ast10x0.c | 11 #include <zephyr/drivers/syscon.h>
30 const struct device *syscon; member
36 const struct device *syscon = config->syscon; in aspeed_reset_line_assert() local
44 return syscon_write_reg(syscon, addr, BIT(id)); in aspeed_reset_line_assert()
50 const struct device *syscon = config->syscon; in aspeed_reset_line_deassert() local
58 return syscon_write_reg(syscon, addr, BIT(id)); in aspeed_reset_line_deassert()
64 const struct device *syscon = config->syscon; in aspeed_reset_status() local
74 ret = syscon_read_reg(syscon, addr, ®_value); in aspeed_reset_status()
103 .syscon = DEVICE_DT_GET(DT_NODELABEL(syscon)), \
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| D | Kconfig.lpc_syscon | 5 bool "NXP Syscon Reset controller driver"
9 Enable the NXP syscon reset controller driver.
10 Syscon is found on LPC parts and LPC heritage parts.
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| /Zephyr-latest/include/zephyr/drivers/ |
| D | syscon.h | 9 * @brief Public SYSCON driver APIs
16 * @brief SYSCON Interface
17 * @defgroup syscon_interface SYSCON Interface
32 * API template to get the base address of the syscon region.
53 * API template to get the size of the syscon register.
60 * @brief System Control (syscon) register driver API
70 * @brief Get the syscon base address
91 * @brief Read from syscon register
93 * This function reads from a specific register in the syscon area
97 * @param val The returned value read from the syscon register
[all …]
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| /Zephyr-latest/boards/arm/v2m_beetle/ |
| D | v2m_beetle.dts | 54 clocks = <&syscon>;
61 clocks = <&syscon>;
68 clocks = <&syscon>;
75 clocks = <&sysclk &syscon>;
83 clocks = <&sysclk &syscon>;
99 clocks = <&syscon>;
108 clocks = <&syscon>;
117 clocks = <&syscon>;
126 clocks = <&syscon>;
129 syscon: syscon@4001f000 { label
[all …]
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| /Zephyr-latest/dts/arm/nxp/ |
| D | nxp_mcxa156.dtsi | 33 syscon: syscon@40000000 { label
34 compatible = "nxp,lpc-syscon";
38 compatible = "nxp,lpc-syscon-reset";
56 clocks = <&syscon MCUX_PORT0_CLK>;
62 clocks = <&syscon MCUX_PORT1_CLK>;
68 clocks = <&syscon MCUX_PORT2_CLK>;
74 clocks = <&syscon MCUX_PORT3_CLK>;
80 clocks = <&syscon MCUX_PORT4_CLK>;
136 clocks = <&syscon MCUX_LPUART0_CLK>;
161 clocks = <&syscon MCUX_CTIMER0_CLK>;
[all …]
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| D | nxp_mcxn94x_common.dtsi | 72 syscon: syscon@0 { label
73 compatible = "nxp,lpc-syscon";
77 compatible = "nxp,lpc-syscon-reset";
85 clocks = <&syscon MCUX_PORT0_CLK>;
91 clocks = <&syscon MCUX_PORT1_CLK>;
97 clocks = <&syscon MCUX_PORT2_CLK>;
103 clocks = <&syscon MCUX_PORT3_CLK>;
109 clocks = <&syscon MCUX_PORT4_CLK>;
115 clocks = <&syscon MCUX_PORT5_CLK>;
192 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
[all …]
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| D | nxp_lpc51u68.dtsi | 26 syscon: syscon@40000000 { label
27 compatible = "nxp,lpc-syscon";
31 compatible = "nxp,lpc-syscon-reset";
100 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
109 clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
118 clocks = <&syscon MCUX_FLEXCOMM2_CLK>;
127 clocks = <&syscon MCUX_FLEXCOMM3_CLK>;
136 clocks = <&syscon MCUX_FLEXCOMM4_CLK>;
145 clocks = <&syscon MCUX_FLEXCOMM5_CLK>;
154 clocks = <&syscon MCUX_FLEXCOMM6_CLK>;
[all …]
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| D | nxp_mcxn23x_common.dtsi | 66 syscon: syscon@0 { label
67 compatible = "nxp,lpc-syscon";
71 compatible = "nxp,lpc-syscon-reset";
79 clocks = <&syscon MCUX_PORT0_CLK>;
85 clocks = <&syscon MCUX_PORT1_CLK>;
91 clocks = <&syscon MCUX_PORT2_CLK>;
97 clocks = <&syscon MCUX_PORT3_CLK>;
103 clocks = <&syscon MCUX_PORT4_CLK>;
109 clocks = <&syscon MCUX_PORT5_CLK>;
185 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
[all …]
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| D | nxp_lpc11u6x.dtsi | 91 clocks = <&syscon LPC11U6X_CLOCK_GPIO>;
107 clocks = <&syscon LPC11U6X_CLOCK_GPIO>;
125 clocks = <&syscon LPC11U6X_CLOCK_GPIO>;
131 syscon: clock-controller@40048000 { label
132 compatible = "nxp,lpc11u6x-syscon";
139 clocks = <&syscon LPC11U6X_CLOCK_USART0>;
147 clocks = <&syscon LPC11U6X_CLOCK_USART1>;
155 clocks = <&syscon LPC11U6X_CLOCK_USART2>;
163 clocks = <&syscon LPC11U6X_CLOCK_USART3>;
171 clocks = <&syscon LPC11U6X_CLOCK_USART4>;
[all …]
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| D | nxp_lpc55S1x_common.dtsi | 75 syscon: syscon@0 { label
76 compatible = "nxp,lpc-syscon";
80 compatible = "nxp,lpc-syscon-reset";
168 clocks = <&syscon MCUX_CTIMER0_CLK>;
180 clocks = <&syscon MCUX_CTIMER1_CLK>;
192 clocks = <&syscon MCUX_CTIMER2_CLK>;
204 clocks = <&syscon MCUX_CTIMER3_CLK>;
216 clocks = <&syscon MCUX_CTIMER4_CLK>;
226 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
235 clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
[all …]
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| D | nxp_lpc55S0x_common.dtsi | 68 syscon: syscon@0 { label
69 compatible = "nxp,lpc-syscon";
73 compatible = "nxp,lpc-syscon-reset";
158 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
167 clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
176 clocks = <&syscon MCUX_FLEXCOMM2_CLK>;
185 clocks = <&syscon MCUX_FLEXCOMM3_CLK>;
194 clocks = <&syscon MCUX_FLEXCOMM4_CLK>;
203 clocks = <&syscon MCUX_FLEXCOMM5_CLK>;
212 clocks = <&syscon MCUX_FLEXCOMM6_CLK>;
[all …]
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| D | nxp_lpc55S3x_common.dtsi | 73 syscon: syscon@0 { label
74 compatible = "nxp,lpc-syscon";
78 compatible = "nxp,lpc-syscon-reset";
189 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
200 clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
211 clocks = <&syscon MCUX_FLEXCOMM2_CLK>;
222 clocks = <&syscon MCUX_FLEXCOMM3_CLK>;
233 clocks = <&syscon MCUX_FLEXCOMM4_CLK>;
244 clocks = <&syscon MCUX_FLEXCOMM5_CLK>;
255 clocks = <&syscon MCUX_FLEXCOMM6_CLK>;
[all …]
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| D | nxp_lpc54xxx.dtsi | 41 syscon: syscon@40000000 { label
42 compatible = "nxp,lpc-syscon";
46 compatible = "nxp,lpc-syscon-reset";
163 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
172 clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
181 clocks = <&syscon MCUX_FLEXCOMM2_CLK>;
190 clocks = <&syscon MCUX_FLEXCOMM3_CLK>;
199 clocks = <&syscon MCUX_FLEXCOMM4_CLK>;
208 clocks = <&syscon MCUX_FLEXCOMM5_CLK>;
217 clocks = <&syscon MCUX_FLEXCOMM6_CLK>;
[all …]
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| D | nxp_lpc55S2x_common.dtsi | 88 syscon: syscon@0 { label
89 compatible = "nxp,lpc-syscon";
93 compatible = "nxp,lpc-syscon-reset";
191 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
200 clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
209 clocks = <&syscon MCUX_FLEXCOMM2_CLK>;
218 clocks = <&syscon MCUX_FLEXCOMM3_CLK>;
227 clocks = <&syscon MCUX_FLEXCOMM4_CLK>;
236 clocks = <&syscon MCUX_FLEXCOMM5_CLK>;
245 clocks = <&syscon MCUX_FLEXCOMM6_CLK>;
[all …]
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| D | nxp_lpc55S6x_common.dtsi | 113 syscon: syscon@0 { label
114 compatible = "nxp,lpc-syscon";
118 compatible = "nxp,lpc-syscon-reset";
235 clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
246 clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
257 clocks = <&syscon MCUX_FLEXCOMM2_CLK>;
268 clocks = <&syscon MCUX_FLEXCOMM3_CLK>;
279 clocks = <&syscon MCUX_FLEXCOMM4_CLK>;
290 clocks = <&syscon MCUX_FLEXCOMM5_CLK>;
301 clocks = <&syscon MCUX_FLEXCOMM6_CLK>;
[all …]
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| /Zephyr-latest/soc/nxp/mcx/mcxn/ |
| D | flash_clock_setup.c | 15 SYSCON->FLEXSPICLKSEL = 0; in flexspi_clock_set_freq()
20 SYSCON->FLEXSPICLKDIV = divider; in flexspi_clock_set_freq()
23 SYSCON->FLEXSPICLKSEL = 1; in flexspi_clock_set_freq()
31 SYSCON->FLEXSPICLKSEL = 3; in flexspi_clock_safe_config()
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| /Zephyr-latest/drivers/entropy/ |
| D | entropy_neorv32_trng.c | 10 #include <zephyr/drivers/syscon.h>
26 const struct device *syscon; member
91 if (!device_is_ready(config->syscon)) { in neorv32_trng_init()
92 LOG_ERR("syscon device not ready"); in neorv32_trng_init()
96 err = syscon_read_reg(config->syscon, NEORV32_SYSINFO_FEATURES, &features); in neorv32_trng_init()
137 .syscon = DEVICE_DT_GET(DT_INST_PHANDLE(n, syscon)), \
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| /Zephyr-latest/tests/drivers/syscon/boards/ |
| D | qemu_cortex_a53.overlay | 19 syscon: syscon@47000000 {
20 compatible = "syscon";
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| /Zephyr-latest/dts/riscv/ |
| D | neorv32.dtsi | 79 syscon = <&sysinfo>;
86 syscon = <&sysinfo>;
109 syscon = <&sysinfo>;
120 syscon = <&sysinfo>;
131 syscon = <&sysinfo>;
134 sysinfo: syscon@ffffffe0 {
135 compatible = "neorv-sysinfo", "syscon";
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| /Zephyr-latest/tests/drivers/syscon/ |
| D | testcase.yaml | 5 drivers.syscon:
8 - syscon
|
| /Zephyr-latest/dts/bindings/rng/ |
| D | neorv32-trng.yaml | 11 syscon:
15 phandle to syscon (NEORV32 SYSINFO) node.
|
