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Searched +full:stm32 +full:- +full:dma +full:- +full:v2bis (Results 1 – 16 of 16) sorted by relevance

/Zephyr-latest/dts/bindings/dma/
Dst,stm32-dma-v2bis.yaml2 # SPDX-License-Identifier: Apache-2.0
5 STM32 DMA controller (V2bis) for the stm32F0, stm32F1 and stm32L1 soc families
7 This DMA controller includes several channels with different requests.
8 All the requests ar ORed before entering the DMA, so that only one request
10 DMA clients connected to the STM32 DMA controller must use the format
11 described in the dma.txt file, using a 2-cell specifier for each
12 channel: a phandle to the DMA controller plus the following four integer cells:
13 1. channel: the dma stream from 1 to <dma-requests>
14 2. channel-config: A 32bit mask specifying the DMA channel configuration
15 A name custom DMA flags for channel configuration is used
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Dst,stm32-dma.yaml2 # SPDX-License-Identifier: Apache-2.0
5 STM32 DMA controller
7 The STM32 DMA is a general-purpose direct memory access controller
8 capable of supporting 5 or 6 or 7 or 8 independent DMA channels.
9 Each stm32 soc with a DMA is of a special version type, which could be
12 or V2bis like stm32F1 or stm32L1, where requests are multiplexed
14 compatible: "st,stm32-dma"
16 include: dma-controller.yaml
27 description: If the DMA controller V1 supports memory to memory transfer
29 dma-offset:
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/Zephyr-latest/drivers/dma/
DKconfig.stm321 # DMA configuration options
6 # SPDX-License-Identifier: Apache-2.0
9 bool "STM32 DMA driver"
17 Driver for STM32 DMA V1, V2, V2bis and BDMA types.
20 bool "STM32U5 serie DMA driver"
25 Enable DMA support mainly for stm32U5 family.
26 It differs from the DMA driver due to the GPDMA peripheral.
35 Enable DMA V1 support.
42 Enable DMA V2 or DMA V2bis support. With the versions V2 of DMA, the
43 peripheral request must be specified in the dma slot of the dma cell
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/Zephyr-latest/dts/arm/st/f3/
Dstm32f303Xe.dtsi4 * SPDX-License-Identifier: Apache-2.0
12 compatible = "zephyr,memory-region", "st,stm32-ccm";
14 zephyr,memory-region = "CCM";
22 flash-controller@40022000 {
28 dma2: dma@40020400 {
29 compatible = "st,stm32-dma-v2bis";
30 #dma-cells = <2>;
39 compatible = "st,stm32-bbram";
40 st,backup-regs = <16>;
Dstm32f303Xb.dtsi4 * SPDX-License-Identifier: Apache-2.0
12 compatible = "zephyr,memory-region", "st,stm32-ccm";
14 zephyr,memory-region = "CCM";
22 flash-controller@40022000 {
28 dma2: dma@40020400 {
29 compatible = "st,stm32-dma-v2bis";
30 #dma-cells = <2>;
39 compatible = "st,stm32-bbram";
40 st,backup-regs = <16>;
Dstm32f302Xc.dtsi4 * SPDX-License-Identifier: Apache-2.0
16 flash-controller@40022000 {
22 dma2: dma@40020400 {
23 compatible = "st,stm32-dma-v2bis";
24 #dma-cells = <2>;
32 compatible = "st,stm32-uart";
39 pinctrl: pin-controller@48000000 {
41 compatible = "st,stm32-gpio";
42 gpio-controller;
43 #gpio-cells = <2>;
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Dstm32f373Xc.dtsi4 * SPDX-License-Identifier: Apache-2.0
16 flash-controller@40022000 {
22 dma2: dma@40020400 {
23 compatible = "st,stm32-dma-v2bis";
31 compatible = "st,stm32-dac";
35 #io-channel-cells = <1>;
Dstm32f3.dtsi2 * Copyright (c) 2017 I-SENSE group of ICCS
6 * SPDX-License-Identifier: Apache-2.0
9 #include <arm/armv7-m.dtsi>
10 #include <zephyr/dt-bindings/clock/stm32f3_clock.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/gpio/gpio.h>
13 #include <zephyr/dt-bindings/pwm/pwm.h>
14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
15 #include <zephyr/dt-bindings/dma/stm32_dma.h>
16 #include <zephyr/dt-bindings/reset/stm32f0_1_3_reset.h>
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/Zephyr-latest/dts/arm/st/f1/
Dstm32f107.dtsi2 * Copyright (c) 2017 I-SENSE group of ICCS
4 * SPDX-License-Identifier: Apache-2.0
11 compatible = "st,stm32f107", "st,stm32f1", "simple-bus";
13 dma2: dma@40020400 {
14 compatible = "st,stm32-dma-v2bis";
15 #dma-cells = <2>;
23 compatible = "st,stm32-ethernet";
26 clock-names = "stmmaceth", "mac-clk-tx",
27 "mac-clk-rx";
Dstm32f103Xc.dtsi2 * Copyright (c) 2017 I-SENSE group of ICCS
7 * SPDX-License-Identifier: Apache-2.0
19 flash-controller@40022000 {
22 erase-block-size = <DT_SIZE_K(2)>;
27 compatible = "st,stm32-uart";
36 compatible = "st,stm32-uart";
45 compatible = "st,stm32-timers";
50 interrupt-names = "global";
55 compatible = "st,stm32-pwm";
57 #pwm-cells = <3>;
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Dstm32f1.dtsi5 * SPDX-License-Identifier: Apache-2.0
8 #include <arm/armv7-m.dtsi>
9 #include <zephyr/dt-bindings/clock/stm32f1_clock.h>
10 #include <zephyr/dt-bindings/i2c/i2c.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/pwm/pwm.h>
13 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
14 #include <zephyr/dt-bindings/dma/stm32_dma.h>
15 #include <zephyr/dt-bindings/adc/stm32f1_adc.h>
16 #include <zephyr/dt-bindings/reset/stm32f0_1_3_reset.h>
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/Zephyr-latest/dts/arm/st/f0/
Dstm32f091.dtsi4 * SPDX-License-Identifier: Apache-2.0
11 compatible = "st,stm32f091", "st,stm32f0", "simple-bus";
14 * USARTs 3-8 share the same IRQ on stm32f091xx devices. This
20 compatible = "st,stm32-usart", "st,stm32-uart";
29 compatible = "st,stm32-usart", "st,stm32-uart";
38 compatible = "st,stm32-usart", "st,stm32-uart";
47 compatible = "st,stm32-usart", "st,stm32-uart";
56 compatible = "st,stm32-bxcan";
63 dma2: dma@40020400 {
64 compatible = "st,stm32-dma-v2bis";
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Dstm32f0.dtsi6 * SPDX-License-Identifier: Apache-2.0
9 #include <arm/armv6-m.dtsi>
10 #include <zephyr/dt-bindings/clock/stm32f0_clock.h>
11 #include <zephyr/dt-bindings/i2c/i2c.h>
12 #include <zephyr/dt-bindings/gpio/gpio.h>
13 #include <zephyr/dt-bindings/pwm/pwm.h>
14 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
15 #include <zephyr/dt-bindings/dma/stm32_dma.h>
16 #include <zephyr/dt-bindings/adc/stm32l4_adc.h>
17 #include <zephyr/dt-bindings/reset/stm32f0_1_3_reset.h>
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/Zephyr-latest/dts/arm/st/wb0/
Dstm32wb0.dtsi4 * SPDX-License-Identifier: Apache-2.0
7 #include <arm/armv6-m.dtsi>
8 #include <zephyr/dt-bindings/i2c/i2c.h>
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/pwm/pwm.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/clock/stm32wb0_clock.h>
13 #include <zephyr/dt-bindings/reset/stm32wb0_reset.h>
14 #include <zephyr/dt-bindings/dma/stm32_dma.h>
25 zephyr,flash-controller = &flash;
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/Zephyr-latest/dts/arm/st/l1/
Dstm32l1.dtsi6 * SPDX-License-Identifier: Apache-2.0
9 #include <arm/armv7-m.dtsi>
10 #include <zephyr/dt-bindings/clock/stm32l1_clock.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/pwm/pwm.h>
14 #include <zephyr/dt-bindings/adc/adc.h>
15 #include <zephyr/dt-bindings/pwm/stm32_pwm.h>
16 #include <zephyr/dt-bindings/dma/stm32_dma.h>
17 #include <zephyr/dt-bindings/adc/stm32f4_adc.h>
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/Zephyr-latest/doc/releases/
Drelease-notes-2.7.rst17 * Support for M-Profile Vector Extensions (MVE) on ARMv8.1-M
18 * Improved thread safety for Newlib and C++ on SMP-capable systems
20 * New Action-based Power Management API
23 * Linker Support for Tightly-Coupled Memory in RISC-V
25 * Support for extended PCI / PCIe capabilities, improved MIS-X support
33 * The kernel now supports both 32- and 64-bit architectures
36 * We added support for Point-to-Point Protocol (PPP)
37 * We added support for UpdateHub, an end-to-end solution for over-the-air device updates
38 * We added support for ARM Cortex-R Architecture
40 * Expanded support for ARMv6-M architecture
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