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/Zephyr-latest/drivers/sensor/bosch/bmi270/
Dbmi270_spi.c4 * SPDX-License-Identifier: Apache-2.0
8 * Bus-specific functionality for BMI270s accessed via SPI.
19 return spi_is_ready_dt(&bus->spi) ? 0 : -ENODEV; in bmi270_bus_check_spi()
26 uint8_t addr; in bmi270_reg_read_spi() local
29 .buf = &addr, in bmi270_reg_read_spi()
48 addr = start | 0x80; in bmi270_reg_read_spi()
50 ret = spi_transceive_dt(&bus->spi, &tx, &rx); in bmi270_reg_read_spi()
64 uint8_t addr; in bmi270_reg_write_spi() local
66 {.buf = &addr, .len = sizeof(addr)}, in bmi270_reg_write_spi()
74 addr = start & BMI270_REG_MASK; in bmi270_reg_write_spi()
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/Zephyr-latest/samples/drivers/spi_fujitsu_fram/src/
Dmain.c4 * SPDX-License-Identifier: Apache-2.0
11 #include <zephyr/drivers/spi.h>
14 * @file Sample app using the Fujitsu MB85RS64V FRAM through SPI.
25 static int mb85rs64v_access(const struct device *spi, in mb85rs64v_access() argument
27 uint8_t cmd, uint16_t addr, void *data, size_t len) in mb85rs64v_access() argument
46 access[1] = (addr >> 8) & 0xFF; in mb85rs64v_access()
47 access[2] = addr & 0xFF; in mb85rs64v_access()
58 return spi_transceive(spi, spi_cfg, &tx, &rx); in mb85rs64v_access()
64 return spi_write(spi, spi_cfg, &tx); in mb85rs64v_access()
68 static int mb85rs64v_read_id(const struct device *spi, in mb85rs64v_read_id() argument
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/Zephyr-latest/dts/bindings/memory-controllers/
Drenesas,smartbond-nor-psram.yaml2 # SPDX-License-Identifier: Apache-2.0
8 compatible: "renesas,smartbond-nor-psram"
14 is-ram:
19 dev-size:
25 dev-type:
31 dev-density:
40 dev-id:
46 reset-delay-us:
52 read-cs-idle-min-ns:
59 erase-cs-idle-min-ns:
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/Zephyr-latest/boards/renesas/da1469x_dk_pro/dts/
Dda1469x_dk_pro_psram.overlay4 * SPDX-License-Identifier: Apache-2.0
9 sram-ext = &memc;
17 /* QSPIC settings for the APS6404L-3SQR QSPI PSRAM memory in QPI mode. */
20 is-ram;
21 dev-size = <DT_SIZE_M(64)>;
22 dev-type = <0x5D>;
23 dev-id = <0x0D>;
24 dev-density = <0xE040>;
25 reset-delay-us = <50>;
26 read-cs-idle-min-ns = <18>;
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/Zephyr-latest/samples/boards/microchip/mec172xevb_assy6906/qmspi_ldma/src/
Dmain.c4 * SPDX-License-Identifier: Apache-2.0
13 #include <zephyr/drivers/spi.h>
63 uint32_t addr; member
122 return -EINVAL; in spi_flash_format_addr()
126 buf[i] = spi_addr >> ((addrsz - i - 1u) * 8); in spi_flash_format_addr()
140 return -EINVAL; in spi_flash_read_status()
171 return -EINVAL; in spi_poll_busy()
189 timeout_ms--; in spi_poll_busy()
193 return -ETIMEDOUT; in spi_poll_busy()
196 /* SPI flash full-duplex write of command opcode, optional command parameters, and optional data */
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/Zephyr-latest/drivers/sensor/bosch/bme680/
Dbme680_spi.c7 * SPDX-License-Identifier: Apache-2.0
11 * Bus-specific functionality for BME680s accessed via SPI.
23 return spi_is_ready_dt(&bus->spi) ? 0 : -ENODEV; in bme680_bus_check_spi()
26 static inline int bme680_set_mem_page(const struct device *dev, uint8_t addr) in bme680_set_mem_page() argument
28 const struct bme680_config *config = dev->config; in bme680_set_mem_page()
29 struct bme680_data *data = dev->data; in bme680_set_mem_page()
30 uint8_t page = (addr > 0x7f) ? 0U : 1U; in bme680_set_mem_page()
33 if (data->mem_page != page) { in bme680_set_mem_page()
55 err = spi_transceive_dt(&config->bus.spi, &tx, &rx); in bme680_set_mem_page()
60 if (data->mem_page == 1U) { in bme680_set_mem_page()
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/Zephyr-latest/dts/bindings/flash_controller/
Dnuvoton,npcx-fiu-nor.yaml2 # SPDX-License-Identifier: Apache-2.0
5 The SPI NOR flash devices accessed by Nuvoton Flash Interface Unit (FIU).
7 Representation of a SPI NOR flash on a qspi bus looks like:
10 compatible ="nuvoton,npcx-fiu-nor";
14 qspi-flags = <NPCX_QSPI_SW_CS1>;
15 mapped-addr = <0x64000000>;
16 pinctrl-0 = <&int_flash_sl>;
17 pinctrl-names = "default";
20 compatible: "nuvoton,npcx-fiu-nor"
22 include: [flash-controller.yaml, pinctrl-device.yaml, "jedec,spi-nor-common.yaml"]
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/Zephyr-latest/drivers/misc/ft8xx/
Dft8xx_drv.c4 * SPDX-License-Identifier: Apache-2.0
11 #include <zephyr/drivers/spi.h>
20 /* SPI device */
21 static const struct spi_dt_spec spi = SPI_DT_SPEC_INST_GET(0, variable
40 #define MAX_READ_LEN (UINT16_MAX - ADDR_SIZE - DUMMY_READ_SIZE)
41 #define MAX_WRITE_LEN (UINT16_MAX - ADDR_SIZE)
47 static void insert_addr(uint32_t addr, uint8_t *buff) in insert_addr() argument
49 buff[0] = (addr >> 16) & 0x3f; in insert_addr()
50 buff[1] = (addr >> 8) & 0xff; in insert_addr()
51 buff[2] = (addr) & 0xff; in insert_addr()
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/Zephyr-latest/drivers/ieee802154/
Dieee802154_rf2xx_iface.c1 /* ieee802154_rf2xx_iface.c - ATMEL RF2XX IEEE 802.15.4 Interface */
4 * Copyright (c) 2019-2020 Gerson Fernando Budke
6 * SPDX-License-Identifier: Apache-2.0
18 #include <zephyr/drivers/spi.h>
29 const struct rf2xx_config *conf = dev->config; in rf2xx_iface_phy_rst()
32 gpio_pin_set_dt(&conf->reset_gpio, 0); in rf2xx_iface_phy_rst()
33 gpio_pin_set_dt(&conf->slptr_gpio, 0); in rf2xx_iface_phy_rst()
38 gpio_pin_set_dt(&conf->reset_gpio, 1); in rf2xx_iface_phy_rst()
40 gpio_pin_set_dt(&conf->reset_gpio, 0); in rf2xx_iface_phy_rst()
44 const struct rf2xx_config *conf = dev->config; in rf2xx_iface_phy_tx_start()
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Dieee802154_cc1200.h1 /* ieee802154_cc1200.h - Registers definition for TI CC1200 */
6 * SPDX-License-Identifier: Apache-2.0
15 #include <zephyr/drivers/spi.h>
24 * SPI pins are easy, RESET as well, but when it comes to GPIO:
25 * CHIP -> EM adapter
26 * GPIO0 -> GPIOA
27 * GPIO1 -> reserved (it's SPI MISO)
28 * GPIO2 -> GPIOB
29 * GPIO3 -> GPIO3
65 bool z_cc1200_access_reg(const struct device *dev, bool read, uint8_t addr,
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/Zephyr-latest/drivers/flash/
Dflash_npcx_fiu_nor.c4 * SPDX-License-Identifier: Apache-2.0
13 #include <zephyr/dt-bindings/flash_controller/npcx_fiu_qspi.h>
37 /* Maximum chip erase time-out in ms */
39 /* SPI Nor device configuration on QSPI bus */
48 /* Specific control operation for Quad-SPI Nor Flash */
63 static inline bool is_within_region(off_t addr, size_t size, off_t region_start, in is_within_region() argument
66 return (addr >= region_start && in is_within_region()
67 (addr < (region_start + region_size)) && in is_within_region()
68 ((addr + size) <= (region_start + region_size))); in is_within_region()
74 const struct flash_npcx_nor_config *config = dev->config; in flash_npcx_uma_transceive()
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Dspi_nor.c2 * Copyright (c) 2018 Savoir-Faire Linux.
6 * This driver is heavily inspired from the spi_flash_w25qxxdv.c SPI NOR driver.
8 * SPDX-License-Identifier: Apache-2.0
16 #include <zephyr/drivers/spi.h>
33 * * When CSn is asserted (during a SPI operation) the device is
36 * * Some devices support a Deep Power-Down mode which reduces current
41 * * PM_DEVICE_STATE_SUSPENDED corresponds to deep-power-down mode;
63 #define DEV_CFG(_dev_) ((const struct spi_nor_config * const) (_dev_)->config)
66 /* MXICY Low-power/high perf mode is second bit in configuration register 2 */
72 /* Build-time data associated with the device. */
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/Zephyr-latest/drivers/ethernet/
Deth_enc424j600.c1 /* ENC424J600 Stand-alone Ethernet Controller with SPI
7 * SPDX-License-Identifier: Apache-2.0
17 #include <zephyr/drivers/spi.h>
29 const struct enc424j600_config *config = dev->config; in enc424j600_write_sbc()
40 spi_write_dt(&config->spi, &tx); in enc424j600_write_sbc()
43 static void enc424j600_write_sfru(const struct device *dev, uint8_t addr, in enc424j600_write_sfru() argument
46 const struct enc424j600_config *config = dev->config; in enc424j600_write_sfru()
58 buf[1] = addr; in enc424j600_write_sfru()
62 spi_write_dt(&config->spi, &tx); in enc424j600_write_sfru()
65 static void enc424j600_read_sfru(const struct device *dev, uint8_t addr, in enc424j600_read_sfru() argument
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Deth_w5500.c1 /* W5500 Stand-alone Ethernet Controller with SPI
6 * SPDX-License-Identifier: Apache-2.0
19 #include <zephyr/drivers/spi.h>
32 #define W5500_SPI_BLOCK_SELECT(addr) (((addr) >> 16) & 0x1f) argument
33 #define W5500_SPI_READ_CONTROL(addr) (W5500_SPI_BLOCK_SELECT(addr) << 3) argument
34 #define W5500_SPI_WRITE_CONTROL(addr) \ argument
35 ((W5500_SPI_BLOCK_SELECT(addr) << 3) | BIT(2))
37 static int w5500_spi_read(const struct device *dev, uint32_t addr, in w5500_spi_read() argument
40 const struct w5500_config *cfg = dev->config; in w5500_spi_read()
44 addr >> 8, in w5500_spi_read()
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/Zephyr-latest/drivers/sensor/bosch/bmm150/
Dbmm150_spi.c6 * SPDX-License-Identifier: Apache-2.0
10 * Bus-specific functionality for BMM150s accessed via SPI.
22 return spi_is_ready_dt(&bus->spi) ? 0 : -ENODEV; in bmm150_bus_check_spi()
28 uint8_t addr; in bmm150_reg_read_spi() local
30 .buf = &addr, in bmm150_reg_read_spi()
52 addr = (start + i) | 0x80; in bmm150_reg_read_spi()
55 ret = spi_transceive_dt(&bus->spi, &tx, &rx); in bmm150_reg_read_spi()
79 ret = spi_write_dt(&bus->spi, &tx); in bmm150_reg_write_spi()
/Zephyr-latest/drivers/sensor/bosch/bme280/
Dbme280_spi.c6 * SPDX-License-Identifier: Apache-2.0
10 * Bus-specific functionality for BME280s accessed via SPI.
22 return spi_is_ready_dt(&bus->spi) ? 0 : -ENODEV; in bme280_bus_check_spi()
28 uint8_t addr; in bme280_reg_read_spi() local
30 .buf = &addr, in bme280_reg_read_spi()
52 addr = (start + i) | 0x80; in bme280_reg_read_spi()
55 ret = spi_transceive_dt(&bus->spi, &tx, &rx); in bme280_reg_read_spi()
79 ret = spi_write_dt(&bus->spi, &tx); in bme280_reg_write_spi()
/Zephyr-latest/drivers/gpio/
Dgpio_mcp23sxx.c6 * SPDX-License-Identifier: Apache-2.0
10 * @file Driver for MPC23Sxx SPI-based GPIO driver.
18 #include <zephyr/drivers/spi.h>
29 const struct mcp23xxx_config *config = dev->config; in mcp23sxx_read_port_regs()
33 uint8_t nread = (config->ngpios == 8) ? 1 : 2; in mcp23sxx_read_port_regs()
35 uint8_t addr = MCP23SXX_ADDR | MCP23SXX_READBIT; in mcp23sxx_read_port_regs() local
36 uint8_t buffer_tx[4] = { addr, reg, 0, 0 }; in mcp23sxx_read_port_regs()
56 ret = spi_transceive_dt(&config->bus.spi, &tx, &rx); in mcp23sxx_read_port_regs()
71 const struct mcp23xxx_config *config = dev->config; in mcp23sxx_write_port_regs()
74 uint8_t nwrite = (config->ngpios == 8) ? 1 : 2; in mcp23sxx_write_port_regs()
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/Zephyr-latest/modules/nrf_wifi/bus/
Dspi_if.c4 * SPDX-License-Identifier: Apache-2.0
8 * @brief File containing SPI device interface specific definitions for the
9 * Zephyr OS layer of the Wi-Fi driver.
14 #include <zephyr/drivers/spi.h>
29 static int spim_xfer_tx(unsigned int addr, void *data, unsigned int len) in spim_xfer_tx() argument
34 (((addr >> 16) & 0xFF) | 0x80), in spim_xfer_tx()
35 (addr >> 8) & 0xFF, in spim_xfer_tx()
36 (addr & 0xFF) in spim_xfer_tx()
52 static int spim_xfer_rx(unsigned int addr, void *data, unsigned int len, unsigned int discard_bytes) in spim_xfer_rx() argument
56 (addr >> 16) & 0xFF, in spim_xfer_rx()
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Dspi_if.h4 * SPDX-License-Identifier: Apache-2.0
8 * @brief Header containing SPI device interface specific declarations for the
9 * Zephyr OS layer of the Wi-Fi driver.
18 int spim_write(unsigned int addr, const void *data, int len);
20 int spim_read(unsigned int addr, void *data, int len);
22 int spim_hl_read(unsigned int addr, void *data, int len);
/Zephyr-latest/drivers/watchdog/
Dwdt_nxp_fs26.c4 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/drivers/spi.h>
63 uint8_t addr; member
68 struct spi_dt_spec spi; member
141 for (i = size; i > 0; i--) { in fs26_calcrc()
149 static int fs26_spi_transceive(const struct spi_dt_spec *spi, in fs26_spi_transceive() argument
176 tx_buf = (uint32_t)(FS26_SET_REG_ADDR(tx_frame->addr) in fs26_spi_transceive()
177 | FS26_SET_DATA(tx_frame->data) in fs26_spi_transceive()
178 | (tx_frame->write ? FS26_RW : 0)); in fs26_spi_transceive()
180 crc = fs26_calcrc((uint8_t *)&tx_buf, sizeof(tx_buf) - 1); in fs26_spi_transceive()
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/Zephyr-latest/boards/gaisler/gr716a_mini/doc/
Dindex.rst6 The GR716-MINI development board provides:
9 * SPI Flash PROM, 32 MiB
37 The application is linked to the on-chip tightly coupled memory by
45 .. code-block:: console
47 $ grmon -u -cginit 0x00010000 -uart /dev/ttyUSB0
50 Copyright (C) 2020 Cobham Gaisler - All rights reserved.
52 Comments or bug-reports to support@gaisler.com
60 AHB-to-AHB Bridge Cobham Gaisler
61 MIL-STD-1553B Interface Cobham Gaisler
63 SPI to AHB Bridge Cobham Gaisler
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/Zephyr-latest/drivers/input/
Dinput_paw32xx.c4 * SPDX-License-Identifier: Apache-2.0
14 #include <zephyr/drivers/spi.h>
64 struct spi_dt_spec spi; member
80 static int paw32xx_read_reg(const struct device *dev, uint8_t addr, uint8_t *value) in paw32xx_read_reg() argument
82 const struct paw32xx_config *cfg = dev->config; in paw32xx_read_reg()
85 .buf = &addr, in paw32xx_read_reg()
86 .len = sizeof(addr), in paw32xx_read_reg()
96 .len = sizeof(addr), in paw32xx_read_reg()
108 return spi_transceive_dt(&cfg->spi, &tx, &rx); in paw32xx_read_reg()
111 static int paw32xx_write_reg(const struct device *dev, uint8_t addr, uint8_t value) in paw32xx_write_reg() argument
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/Zephyr-latest/include/zephyr/drivers/flash/
Dnpcx_flash_api_ex.h4 * SPDX-License-Identifier: Apache-2.0
20 * Execute a SPI transaction via User Mode Access (UMA) mode. Users can
21 * perform a customized SPI transaction to gread or write the device's
27 * NPCX Configure specific operation for Quad-SPI nor flash.
29 * It configures specific operation for Quad-SPI nor flash such as lock
35 * NPCX Get specific operation for Quad-SPI nor flash.
37 * It returns current specific operation for Quad-SPI nor flash.
47 uint32_t addr; member
/Zephyr-latest/include/zephyr/drivers/wifi/nrf_wifi/bus/
Drpu_hw_if.h4 * SPDX-License-Identifier: Apache-2.0
9 * using QSPI and SPI that can be invoked by shell or the driver.
37 int rpu_read(unsigned int addr, void *data, int len);
38 int rpu_write(unsigned int addr, const void *data, int len);
43 void rpu_get_sleep_stats(uint32_t addr, uint32_t *buff, uint32_t wrd_len);
/Zephyr-latest/drivers/sensor/adi/adxl345/
Dadxl345.c4 * SPDX-License-Identifier: Apache-2.0
23 return device_is_ready(bus->i2c.bus); in adxl345_bus_is_ready_i2c()
29 const struct adxl345_dev_config *cfg = dev->config; in adxl345_reg_access_i2c()
32 return i2c_burst_read_dt(&cfg->bus.i2c, reg_addr, data, length); in adxl345_reg_access_i2c()
34 return i2c_burst_write_dt(&cfg->bus.i2c, reg_addr, data, length); in adxl345_reg_access_i2c()
39 #if DT_ANY_INST_ON_BUS_STATUS_OKAY(spi)
42 return spi_is_ready_dt(&bus->spi); in adxl345_bus_is_ready_spi()
48 const struct adxl345_dev_config *cfg = dev->config; in adxl345_reg_access_spi()
60 ret = spi_transceive_dt(&cfg->bus.spi, &tx, &rx); in adxl345_reg_access_spi()
63 ret = spi_write_dt(&cfg->bus.spi, &tx); in adxl345_reg_access_spi()
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