Lines Matching +full:spi +full:- +full:addr
4 * SPDX-License-Identifier: Apache-2.0
23 return device_is_ready(bus->i2c.bus); in adxl345_bus_is_ready_i2c()
29 const struct adxl345_dev_config *cfg = dev->config; in adxl345_reg_access_i2c()
32 return i2c_burst_read_dt(&cfg->bus.i2c, reg_addr, data, length); in adxl345_reg_access_i2c()
34 return i2c_burst_write_dt(&cfg->bus.i2c, reg_addr, data, length); in adxl345_reg_access_i2c()
39 #if DT_ANY_INST_ON_BUS_STATUS_OKAY(spi)
42 return spi_is_ready_dt(&bus->spi); in adxl345_bus_is_ready_spi()
48 const struct adxl345_dev_config *cfg = dev->config; in adxl345_reg_access_spi()
60 ret = spi_transceive_dt(&cfg->bus.spi, &tx, &rx); in adxl345_reg_access_spi()
63 ret = spi_write_dt(&cfg->bus.spi, &tx); in adxl345_reg_access_spi()
67 #endif /* DT_ANY_INST_ON_BUS_STATUS_OKAY(spi) */
69 int adxl345_reg_access(const struct device *dev, uint8_t cmd, uint8_t addr, in adxl345_reg_access() argument
72 const struct adxl345_dev_config *cfg = dev->config; in adxl345_reg_access()
74 return cfg->reg_access(dev, cmd, addr, data, len); in adxl345_reg_access()
77 int adxl345_reg_write(const struct device *dev, uint8_t addr, uint8_t *data, in adxl345_reg_write() argument
81 return adxl345_reg_access(dev, ADXL345_WRITE_CMD, addr, data, len); in adxl345_reg_write()
84 int adxl345_reg_read(const struct device *dev, uint8_t addr, uint8_t *data, in adxl345_reg_read() argument
88 return adxl345_reg_access(dev, ADXL345_READ_CMD, addr, data, len); in adxl345_reg_read()
91 int adxl345_reg_write_byte(const struct device *dev, uint8_t addr, uint8_t val) in adxl345_reg_write_byte() argument
93 return adxl345_reg_write(dev, addr, &val, 1); in adxl345_reg_write_byte()
96 int adxl345_reg_read_byte(const struct device *dev, uint8_t addr, uint8_t *buf) in adxl345_reg_read_byte() argument
99 return adxl345_reg_read(dev, addr, buf, 1); in adxl345_reg_read_byte()
123 const struct adxl345_dev_config *cfg = dev->config; in adxl345_bus_is_ready()
125 return cfg->bus_is_ready(&cfg->bus); in adxl345_bus_is_ready()
148 * @param dev - The device structure.
149 * @param mode - FIFO Mode. Specifies FIFO operating mode.
154 * @param trigger - FIFO trigger. Links trigger event to appropriate INT.
157 * @param fifo_samples - FIFO Samples. Watermark number of FIFO samples that
168 struct adxl345_dev_data *data = dev->data; in adxl345_configure_fifo()
173 return -EINVAL; in adxl345_configure_fifo()
185 data->fifo_config.fifo_trigger = trigger; in adxl345_configure_fifo()
186 data->fifo_config.fifo_mode = mode; in adxl345_configure_fifo()
187 data->fifo_config.fifo_samples = fifo_samples; in adxl345_configure_fifo()
194 * @param dev - The device structure.
195 * @param op_mode - Mode of operation.
209 * @param dev - The device structure.
210 * @param odr - Output data rate.
232 struct adxl345_dev_config *cfg = (struct adxl345_dev_config *)dev->config; in adxl345_attr_set_odr()
234 switch (val->val1) { in adxl345_attr_set_odr()
254 return -EINVAL; in adxl345_attr_set_odr()
260 cfg->odr = odr; in adxl345_attr_set_odr()
275 return -ENOTSUP; in adxl345_attr_set()
302 sample->x = raw_x; in adxl345_read_sample()
303 sample->y = raw_y; in adxl345_read_sample()
304 sample->z = raw_z; in adxl345_read_sample()
315 val->val1 = ((sample * SENSOR_G) / 32) / 1000000; in adxl345_accel_convert()
316 val->val2 = ((sample * SENSOR_G) / 32) % 1000000; in adxl345_accel_convert()
322 struct adxl345_dev_data *data = dev->data; in adxl345_sample_fetch()
327 data->sample_number = 0; in adxl345_sample_fetch()
334 __ASSERT_NO_MSG(samples_count <= ARRAY_SIZE(data->bufx)); in adxl345_sample_fetch()
342 data->bufx[s] = sample.x; in adxl345_sample_fetch()
343 data->bufy[s] = sample.y; in adxl345_sample_fetch()
344 data->bufz[s] = sample.z; in adxl345_sample_fetch()
354 struct adxl345_dev_data *data = dev->data; in adxl345_channel_get()
356 if (data->sample_number >= ARRAY_SIZE(data->bufx)) { in adxl345_channel_get()
357 data->sample_number = 0; in adxl345_channel_get()
362 adxl345_accel_convert(val, data->bufx[data->sample_number]); in adxl345_channel_get()
363 data->sample_number++; in adxl345_channel_get()
366 adxl345_accel_convert(val, data->bufy[data->sample_number]); in adxl345_channel_get()
367 data->sample_number++; in adxl345_channel_get()
370 adxl345_accel_convert(val, data->bufz[data->sample_number]); in adxl345_channel_get()
371 data->sample_number++; in adxl345_channel_get()
374 adxl345_accel_convert(val++, data->bufx[data->sample_number]); in adxl345_channel_get()
375 adxl345_accel_convert(val++, data->bufy[data->sample_number]); in adxl345_channel_get()
376 adxl345_accel_convert(val, data->bufz[data->sample_number]); in adxl345_channel_get()
377 data->sample_number++; in adxl345_channel_get()
380 return -ENOTSUP; in adxl345_channel_get()
402 * @param dev - The device structure.
403 * @param int1 - INT1 interrupt pins.
410 const struct adxl345_dev_config *cfg = dev->config; in adxl345_interrupt_config()
427 gpio_pin_interrupt_configure_dt(&cfg->interrupt, in adxl345_interrupt_config()
437 struct adxl345_dev_data *data = dev->data; in adxl345_init()
439 const struct adxl345_dev_config *cfg = dev->config; in adxl345_init()
443 data->sample_number = 0; in adxl345_init()
447 return -ENODEV; in adxl345_init()
453 return -ENODEV; in adxl345_init()
459 return -EIO; in adxl345_init()
465 return -EIO; in adxl345_init()
468 data->selected_range = ADXL345_RANGE_8G; in adxl345_init()
473 return -EIO; in adxl345_init()
488 return -EIO; in adxl345_init()
495 return -EIO; in adxl345_init()
498 rc = adxl345_set_odr(dev, cfg->odr); in adxl345_init()
511 data->is_full_res = is_full_res_set; in adxl345_init()
534 /* Conditionally set the RTIO size based on the presence of SPI/I2C
535 * lines 541 - 542.
538 * (adx345_stram - line 203), using smaller amounts of samples
542 /* Conditionally include SPI and/or I2C parts based on their presence */ \
543 COND_CODE_1(DT_INST_ON_BUS(inst, spi), \
563 .bus = {.spi = SPI_DT_SPEC_INST_GET(inst, \
595 COND_CODE_1(DT_INST_ON_BUS(inst, spi), (ADXL345_CONFIG_SPI(inst)), \