/Zephyr-latest/dts/bindings/ospi/ |
D | st,stm32-ospi.yaml | 2 # SPDX-License-Identifier: Apache-2.0 9 pinctrl-0 = <&octospi_clk_pe9 &octospi_ncs_pe10 &octospi_dqs_pe11 16 dma-names = "tx_rx"; 21 compatible: "st,stm32-ospi" 23 include: [base.yaml, pinctrl-device.yaml] 34 pinctrl-0: 37 pinctrl-names: 40 clock-names: 50 - &dma1: dma controller phandle 51 - 5: channel number (0 to Max-Channel minus 1). From 0 to 15 on stm32u5x. [all …]
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/Zephyr-latest/dts/bindings/tcpc/ |
D | nuvoton,numaker-tcpc.yaml | 2 # SPDX-License-Identifier: Apache-2.0 4 description: Nuvoton NuMaker USB Type-C port controller 6 compatible: "nuvoton,numaker-tcpc" 8 include: [base.yaml, reset-device.yaml, pinctrl-device.yaml] 23 vconn-overcurrent-event-polarity: 28 - "low-active" 29 - "high-active" 31 vconn-discharge-polarity: 36 - "low-active" 37 - "high-active" [all …]
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/Zephyr-latest/drivers/gpio/ |
D | gpio_npcx.c | 4 * SPDX-License-Identifier: Apache-2.0 12 #include <zephyr/dt-bindings/gpio/nuvoton-npcx-gpio.h> 34 /* IO port */ 35 int port; member 50 ((struct gpio_reg *)((const struct gpio_npcx_config *)(dev)->config)->base) 53 const struct device *npcx_get_gpio_dev(int port) in npcx_get_gpio_dev() argument 55 if (port >= ARRAY_SIZE(gpio_devs)) { in npcx_get_gpio_dev() 59 return gpio_devs[port]; in npcx_get_gpio_dev() 64 const struct gpio_npcx_config *const config = dev->config; in npcx_gpio_enable_io_pads() 65 const struct npcx_wui *io_wui = &config->wui_maps[pin]; in npcx_gpio_enable_io_pads() [all …]
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D | gpio_stm32.h | 2 * Copyright (c) 2016 Open-RnD Sp. z o.o. 4 * SPDX-License-Identifier: Apache-2.0 17 #include <zephyr/dt-bindings/pinctrl/stm32f1-pinctrl.h> 19 #include <zephyr/dt-bindings/pinctrl/stm32-pinctrl.h> 235 unsigned int out_state; /* 1 (high level) or 0 (low level) */ 245 /* port base address */ 247 /* IO port */ 248 int port; member 269 * @param dev GPIO port device pointer 270 * @param pin IO pin
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D | gpio_pcf857x.c | 4 * 2023 Amrith Venkat Kesavamoorthi <amrith@mr-beam.org> 7 * SPDX-License-Identifier: Apache-2.0 9 * @see https://www.nxp.com/docs/en/data-sheet/PCF8575.pdf 10 * @see https://www.nxp.com/docs/en/data-sheet/PCF8574_PCF8574A.pdf 64 const struct pcf857x_drv_cfg *drv_cfg = dev->config; in pcf857x_process_input() 65 struct pcf857x_drv_data *drv_data = dev->data; in pcf857x_process_input() 69 rc = i2c_read_dt(&drv_cfg->i2c, rx_buf, drv_data->num_bytes); in pcf857x_process_input() 71 LOG_ERR("%s: failed to read from device: %d", dev->name, rc); in pcf857x_process_input() 72 return -EIO; in pcf857x_process_input() 76 *value = sys_get_le16(rx_buf); /*format P17-P10..P07-P00 (bit15-bit8..bit7-bit0)*/ in pcf857x_process_input() [all …]
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D | gpio_dw.c | 4 * SPDX-License-Identifier: Apache-2.0 13 #include <zephyr/dt-bindings/gpio/snps-designware-gpio.h> 29 static int gpio_dw_port_set_bits_raw(const struct device *port, uint32_t mask); 30 static int gpio_dw_port_clear_bits_raw(const struct device *port, 34 * ARC architecture configure IP through IO auxiliary registers. 88 uint32_t port = (base_addr & 0x3f) / 12U; in dw_derive_port_from_base() local 89 return port; in dw_derive_port_from_base() 94 return ((int)(config->irq_num) > 0U); in dw_interrupt_support() 101 /* 4-port GPIO implementation translates from base address to port */ in dw_get_ext_port() 125 /* 4-port GPIO implementation translates from base address to port */ in dw_get_data_port() [all …]
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D | gpio_esp32.c | 5 * SPDX-License-Identifier: Apache-2.0 10 /* Include esp-idf headers first to avoid redefining BIT() macro */ 22 #include <zephyr/dt-bindings/gpio/espressif-esp32-gpio.h> 65 #define CPU_ID() arch_curr_cpu()->id 110 const struct gpio_esp32_config *const cfg = dev->config; in gpio_esp32_config() 111 uint32_t io_pin = (uint32_t) pin + ((cfg->gpio_port == 1 && pin < 32) ? 32 : 0); in gpio_esp32_config() 116 LOG_ERR("Selected IO pin is not valid."); in gpio_esp32_config() 117 return -EINVAL; in gpio_esp32_config() 130 ret = -EINVAL; in gpio_esp32_config() 147 ret = -ENOTSUP; in gpio_esp32_config() [all …]
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/Zephyr-latest/samples/subsys/usb_c/sink/boards/ |
D | numaker_m2l31ki.overlay | 1 /* SPDX-License-Identifier: Apache-2.0 */ 3 #include <dt-bindings/usb-c/pd.h> 7 usbc-port0 = &port0; 11 #address-cells = <1>; 12 #size-cells = <0>; 14 port0: usbc-port@0 { 15 compatible = "usb-c-connector"; 20 power-role = "sink"; 21 sink-pdos = <PDO_FIXED(5000, 100, 0)>; 30 digital-path-disable; [all …]
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/Zephyr-latest/drivers/interrupt_controller/ |
D | intc_ioapic.c | 2 * Copyright (c) 1997-1998, 2000-2002, 2004, 2006-2008, 2011-2015 Wind River 5 * SPDX-License-Identifier: Apache-2.0 12 * @brief Intel IO APIC/xAPIC driver 14 * This module is a driver for the IO APIC/xAPIC (Advanced Programmable 16 * and P7 (Pentium4) family processors. The IO APIC/xAPIC is included 18 * may be required to enable the IO APIC/xAPIC in some chip sets. 19 * The 8259A interrupt controller is intended for use in a uni-processor 20 * system, IO APIC can be used in either a uni-processor or multi-processor 21 * system. The IO APIC handles interrupts very differently than the 8259A. 23 * - Method of Interrupt Transmission. The IO APIC transmits interrupts [all …]
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/Zephyr-latest/boards/blues/swan_r5/doc/ |
D | index.rst | 6 Swan is a low-cost embeddable STM32L4-based microcontroller designed to 7 accelerate the development and deployment of battery-powered solutions. 8 It is especially useful for applications requiring large memory or a high 12 Uniquely for Feather-compatible boards, Swan is designed to satisfy 13 developers' needs that span from early prototyping through high-volume 15 Adafruit's myriad sensors and FeatherWing-compatible carriers. 16 Due to its novel design, for high-volume deployment the low-cost Swan 20 The board has three independent power options---USB, Battery, or Line 21 power---and provides a software-switchable 2 Amp regulator for powering external 22 sensors. When operating in its low-power operating mode, the entire Swan [all …]
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/Zephyr-latest/dts/bindings/pinctrl/ |
D | nuvoton,npcx-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0 10 - bias-pull-down: Enable pull-down resistor. 11 - bias-pull-up: Enable pull-up resistor. 12 - drive-open-drain: Output driver is open-drain. 15 - pinmux-locked: Lock pinmux configuration for peripheral device 16 - pinmux-gpio: Inverse pinmux back to gpio 17 - psl-in-mode: Select the assertion detection mode of PSL input 18 - psl-in-pol: Select the assertion detection polarity of PSL input 23 #include <nuvoton/npcx/npcx7/npcx7-pinctrl.dtsi> 25 We want to use the I2C0_0 port of the NPCX7M6FB controller and enable the [all …]
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/Zephyr-latest/soc/nuvoton/npcx/common/ |
D | soc_miwu.h | 4 * SPDX-License-Identifier: Apache-2.0 49 NPCX_MIWU_TRIG_HIGH, /** Edge rising or active high detection */ 60 * @brief NPCX wake-up input source structure 62 * Used to indicate a Wake-Up Input source (WUI) belongs to which group and bit 63 * of Multi-Input Wake-Up Unit (MIWU) modules. 72 * Define npcx miwu driver callback handler signature for wake-up input source 90 struct npcx_wui wui; /** Wake-up input source of GPIO */ 104 const struct device *source; /** Wake-up input source */ 117 /** Node of single-linked list */ 135 * @brief Enable interrupt of the wake-up input source [all …]
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/Zephyr-latest/boards/wemos/esp32s2_lolin_mini/doc/ |
D | index.rst | 6 ESP32-S2 is a highly integrated, low-power, single-core Wi-Fi Microcontroller SoC, designed to be s… 7 cost-effective, with a high performance and a rich set of IO capabilities. [1]_ 11 - RSA-3072-based secure boot 12 - AES-XTS-256-based flash encryption 13 - Protected private key and device secrets from software access 14 - Cryptographic accelerators for enhanced performance 15 - Protection against physical fault injection attacks 16 - Various peripherals: 18 - 43x programmable GPIOs 19 - 14x configurable capacitive touch GPIOs [all …]
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/Zephyr-latest/boards/fanke/fk750m1_vbt6/doc/ |
D | index.rst | 6 The FK750M1-VBT6 core board by FANKE Technology Co., Ltd. is an advanced microcontroller 7 platform based on the STMicroelectronics Arm® Cortex®-M7 core STM32H750VBT6 microcontroller. 8 This board is an ideal solution for developers looking to create high-performance 12 The FK750M1-VBT6 is designed as a reference design for user application development before 20 FK750M1-VBT6 provides the following hardware components: 22 - STM32H750VB in LQFP100 package 23 - ARM 32-bit Cortex-M7 CPU with FPU 24 - 480 MHz max CPU frequency 25 - 128 KB Flash 26 - 1 MB SRAM: 192 Kbytes TCM RAM (64 Kbytes ITCM RAM + 128 Kbytes DTCM RAM), 864 Kbytes user SRAM, a… [all …]
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/Zephyr-latest/drivers/sdhc/ |
D | sdhc_cdns_ll.h | 3 * SPDX-License-Identifier: Apache-2.0 26 /* SRS09 - Present State Register */ 30 /* SRS10 - Host Control 1 (General / Power / Block-Gap / Wake-Up) */ 64 * • 1111b - Reserved 65 * • 1110b - t_sdmclk*2(27+2) 66 * • 1101b - t_sdmclk*2(26+2) 100 /* V18SE is 0 for DS and HS, 1 for UHS-I */ 154 /* PHY access port */ 158 /* PHY data access port */ 227 /* HRS07 - IO Delay Information Register */ [all …]
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/Zephyr-latest/boards/fanke/fk7b0m1_vbt6/doc/ |
D | index.rst | 3 FANKE FK7B0M1-VBT6 9 The FK7B0M1-VBT6 core board by FANKE Technology Co., Ltd. is an advanced microcontroller 10 platform based on the STMicroelectronics Arm® Cortex®-M7 core STM32H7B0VBT6 microcontroller. 11 This board is an ideal solution for developers looking to create high-performance 12 applications, especially in the field of Human-Machine Interface (HMI), leveraging its 15 The FK7B0M1-VBT6 is designed as a reference design for user application development before 24 :alt: FK7B0M1-VBT6 26 FK7B0M1-VBT6 (Credit: FANKE Technology Co., Ltd) 31 FK7B0M1-VBT6 provides the following hardware components: 33 - STM32H7B6VB in LQFP100 package [all …]
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/Zephyr-latest/soc/nordic/nrf54h/bicr/ |
D | bicr-schema.json | 14 "VDDH supplied with 2.1-5.5 V and VDD regulated by the chip (inductor present)", 31 "title": "IO port power configuration", 121 "title": "IO port impedance configuration", 240 "title": "Use built-in load capacitors", 257 "title": "Built-in load capacitance", 347 "title": "High Frequency Cristal Oscillator (HFXO) configuration", 385 "title": "Use built-in load capacitors", 402 "title": "Built-in load capacitance",
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/Zephyr-latest/drivers/espi/ |
D | host_subs_npcx.c | 4 * SPDX-License-Identifier: Apache-2.0 13 * This file contains the drivers of NPCX Host Sub-Modules that serve as an 16 * +------------+ 17 * | Serial |---> TXD 18 * +<--->| Port |<--- RXD 19 * | | |<--> ... 20 * | +------------+ 21 * | +------------+ | 22 * +------------+ |<--->| KBC & PM |<--->| 23 * eSPI_CLK --->| eSPI Bus | | | Channels | | [all …]
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/Zephyr-latest/drivers/dp/ |
D | swdp_bitbang.c | 2 * Copyright (c) 2018-2019 PHYTEC Messtechnik GmbH 5 * SPDX-License-Identifier: Apache-2.0 9 * This file is based on SW_DP.c from CMSIS-DAP Source (Revision: V2.0.0) 10 * https://github.com/ARM-software/CMSIS_5/tree/develop/CMSIS/DAP/Firmware 11 * Copyright (c) 2013-2017, ARM Limited, All Rights Reserved 12 * SPDX-License-Identifier: Apache-2.0 16 /* Serial Wire Debug Port interface bit-bang driver */ 69 * - CMSIS-DAP Command Specification, DAP_Transfer 70 * - ARM Debug Interface v5 Architecture Specification 88 /* Set SWCLK DAP hardware output pin to high level */ [all …]
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/Zephyr-latest/dts/arm/silabs/ |
D | efr32bg2x.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 #include <arm/armv8-m.dtsi> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/i2c/i2c.h> 10 #include <dt-bindings/pinctrl/gecko-pinctrl.h> 11 #include <dt-bindings/adc/adc.h> 16 zephyr,flash-controller = &msc; 22 #clock-cells = <0>; 23 compatible = "fixed-factor-clock"; 27 #clock-cells = <0>; [all …]
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D | efr32mg24.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 #include <arm/armv8-m.dtsi> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/i2c/i2c.h> 10 #include <dt-bindings/adc/adc.h> 11 #include <dt-bindings/clock/silabs/xg24-clock.h> 16 zephyr,flash-controller = &msc; 22 #clock-cells = <0>; 23 compatible = "fixed-factor-clock"; 27 #clock-cells = <0>; [all …]
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/Zephyr-latest/drivers/serial/ |
D | uart_ns16550.c | 1 /* ns16550.c - NS16550D serial driver */ 6 * Copyright (c) 2010, 2012-2015 Wind River Systems, Inc. 7 * Copyright (c) 2020-2023 Intel Corp. 9 * SPDX-License-Identifier: Apache-2.0 18 * Before individual UART port can be used, uart_ns16550_port_init() has to be 19 * called to setup the port. 72 /* If any node has property io-mapped set, we need to support IO port 76 * as io-mapped property is considered always exists and present, 78 * resort to the follow helper to see if any okay nodes have io-mapped 165 * RXRDY pin will go inactive when there are no more charac- [all …]
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/Zephyr-latest/tests/lib/devicetree/api/ |
D | app.overlay | 4 * SPDX-License-Identifier: Apache-2.0 9 * with real-world devicetree nodes, to allow these tests to run on 15 test-alias = &test_nodelabel; 28 #address-cells = < 0x1 >; 29 #size-cells = < 0x1 >; 30 interrupt-parent = <&test_intc>; 32 test_cpu_intc: interrupt-controller { 33 compatible = "vnd,cpu-intc"; 34 #address-cells = <0>; 35 #interrupt-cells = < 0x01 >; [all …]
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/Zephyr-latest/boards/nxp/rddrone_fmuk66/doc/ |
D | index.rst | 9 - Comes with a J-Link Edu Mini for programming and UART console. 14 - MK66FN2MOVLQ18 MCU (180 MHz, 2 MB flash memory, 256 KB RAM, low-power, 15 crystal-less USB, and 144 Low profile Quad Flat Package (LQFP)) 16 - Dual role USB interface with micro-B USB connector 17 - RGB LED 18 - FXOS8700CQ accelerometer and magnetometer 19 - FXAS21002CQ gyro 20 - BMM150 magnetometer 21 - ML3114A2 barometer 22 - BMP280 barometer [all …]
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/Zephyr-latest/boards/espressif/esp32_ethernet_kit/doc/ |
D | index.rst | 6 The ESP32-Ethernet-Kit is an Ethernet-to-Wi-Fi development board that enables 7 Ethernet devices to be interconnected over Wi-Fi. At the same time, to provide 8 more flexible power supply options, the ESP32-Ethernet-Kit also supports power 11 .. _get-started-esp32-ethernet-kit-v1.2-overview: 13 ESP32-Ethernet-Kit is an ESP32-WROVER-E based development. 14 For more information, check the datasheet at `ESP32-WROVER-E Datasheet`_. 17 board B. The `Ethernet Board (A)`_ contains Bluetooth/Wi-Fi dual-mode 18 ESP32-WROVER-E module and IP101GRI, a Single Port 10/100 Fast Ethernet 23 .. _get-started-esp32-ethernet-kit-v1.2: 25 .. figure:: img/esp32-ethernet-kit-v1.2.jpg [all …]
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