1# Copyright (c) 2022 STMicroelectronics
2# SPDX-License-Identifier: Apache-2.0
3
4description: |
5    STM32 OSPI device representation. Enabling a stm32 octospi node in a board
6    description would typically requires this:
7
8        &octospi {
9            pinctrl-0 = <&octospi_clk_pe9 &octospi_ncs_pe10 &octospi_dqs_pe11
10                         &octospi_io0_pe12 &octospi_io1_pe13
11                         &octospi_io2_pe14 &octospi_io3_pe15
12                         &octospi_io4_pe16 &octospi_io5_pe17
13                         &octospi_io6_pe18 &octospi_io7_pe19>;
14
15            dmas = <&dma1 5 41 0x10000>;
16            dma-names = "tx_rx";
17
18            status = "okay";
19        };
20
21compatible: "st,stm32-ospi"
22
23include: [base.yaml, pinctrl-device.yaml]
24
25bus: ospi
26
27properties:
28  reg:
29    required: true
30
31  interrupts:
32    required: true
33
34  pinctrl-0:
35    required: true
36
37  pinctrl-names:
38    required: true
39
40  clock-names:
41    required: true
42
43  dmas:
44    description: |
45      Optional DMA channel specifier, required for DMA transactions.
46      For example dmas for TX/RX on OSPI
47         dmas = <&dma1 5 41 0x10000>;
48
49      With, in each cell of the dmas specifier:
50      - &dma1: dma controller phandle
51      - 5: channel number (0 to Max-Channel minus 1). From 0 to 15 on stm32u5x.
52      - 41: slot number (request which could be given by the DMAMUX)
53      - 0x10000: channel configuration (only for srce/dest data size, priority)
54
55      Notes:
56        - On series supporting DMAMUX, the DMA phandle should be provided
57          but DMAMUX node should also be enabled in the DTS.
58        - For channel configuration, only the config bits priority and
59          periph/mem datasize are used. The periph/mem datasize must be equal,
60          0 is a correct value.
61         - There is no Fifo used by this DMA peripheral.
62
63      For example dmas for TX/RX on OSPI
64         dmas = <&dma1 5 41 0x10000>;
65
66  dma-names:
67    description: |
68      DMA channel name. If DMA should be used, expected value is "tx_rx".
69
70      For example
71         dma-names = "tx_rx";
72
73  dlyb-bypass:
74    type: boolean
75    description: |
76      Enables Delay Block (DLYB) Bypass.
77
78  ssht-enable:
79    type: boolean
80    description: |
81      Enables Sample Shifting half-cycle.
82
83      It is recommended to be enabled in STR mode and disabled in DTR mode.
84
85  io-low-port:
86    type: string
87    enum:
88      - "IOPORT_NONE"
89      - "IOPORT_1_LOW"
90      - "IOPORT_1_HIGH"
91      - "IOPORT_2_LOW"
92      - "IOPORT_2_HIGH"
93    description: |
94      Specifies which port of the OCTOSPI IO Manager is used for the IO[3:0] pins.
95
96      If absent, then `IOPORT_<n>_LOW` is used where `n` is the OSPI
97      instance number.
98
99      Note: You might need to enable the OCTOSPI I/O manager clock to use the
100            property. Please refer to Reference Manual.
101            The clock can be enabled in the devicetree.
102
103  io-high-port:
104    type: string
105    enum:
106      - "IOPORT_NONE"
107      - "IOPORT_1_LOW"
108      - "IOPORT_1_HIGH"
109      - "IOPORT_2_LOW"
110      - "IOPORT_2_HIGH"
111    description: |
112      Specifies which port of the OCTOSPI IO Manager is used for the IO[7:4] pins.
113
114      If absent, then `IOPORT_<n>_HIGH` is used where `n` is the OSPI
115      instance number.
116
117      Can be set to `IOPORT_NONE` for Single SPI, Dual SPI and Quad SPI.
118
119      Note: You might need to enable the OCTOSPI I/O manager clock to use the
120            property. Please refer to Reference Manual.
121            The clock can be enabled in the devicetree.
122
123  clk-port:
124    type: int
125    enum:
126      - 1
127      - 2
128    description: |
129      Specifies which port of the OCTOSPI IO Manager is used for the clk pin.
130
131      If absent, then n is used where `n` is the OSPI
132      instance number.
133
134      Note: You might need to enable the OCTOSPI I/O manager clock to use the
135            property. Please refer to Reference Manual.
136            The clock can be enabled in the devicetree.
137
138  dqs-port:
139    type: int
140    enum:
141      - 1
142      - 2
143    description: |
144      Specifies which port of the OCTOSPI IO Manager is used for the dqs pin.
145
146      If absent, then n is used where `n` is the OSPI
147      instance number.
148
149      Note: You might need to enable the OCTOSPI I/O manager clock to use the
150            property. Please refer to Reference Manual.
151            The clock can be enabled in the devicetree.
152
153  ncs-port:
154    type: int
155    enum:
156      - 1
157      - 2
158    description: |
159      Specifies which port of the OCTOSPI IO Manager is used for the ncs pin.
160
161      If absent, then n is used where `n` is the OSPI
162      instance number.
163
164      Note: You might need to enable the OCTOSPI I/O manager clock to use the
165            property. Please refer to Reference Manual.
166            The clock can be enabled in the devicetree.
167