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/Zephyr-latest/drivers/interrupt_controller/
DKconfig.gic1 # ARM Generic Interrupt Controller (GIC) configuration
8 config GIC config
13 select GIC
20 select GIC
22 The ARM Generic Interrupt Controller v2 (e.g. GIC-400) works with the
27 select GIC
29 The ARM Generic Interrupt Controller v3 (e.g. GIC-500 and GIC-600)
34 depends on GIC
55 bool "GIC v3 Interrupt Translation Service"
67 bool "GIC Distributor Safe Configuration"
[all …]
/Zephyr-latest/dts/arm64/qemu/
Dqemu-virt-arm64.dtsi10 * qemu-system-aarch64 -machine virt,gic-version=host,accel=kvm
18 #include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
44 interrupt-parent = <&gic>;
66 interrupt-parent = <&gic>;
68 gic: interrupt-controller@8000000 { label
69 compatible = "arm,gic-v3", "arm,gic";
79 compatible = "arm,gic-v3-its";
115 interrupt-map = <0x00 0x00 0x00 1 &gic 0 0 GIC_SPI
117 0x00 0x00 0x00 2 &gic 0 0 GIC_SPI
119 0x00 0x00 0x00 3 &gic 0 0 GIC_SPI
[all …]
Dqemu-virt-a53.dtsi18 #include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
44 interrupt-parent = <&gic>;
66 interrupt-parent = <&gic>;
68 gic: interrupt-controller@8000000 { label
69 compatible = "arm,gic-v3", "arm,gic";
79 compatible = "arm,gic-v3-its";
115 interrupt-map = <0x00 0x00 0x00 1 &gic 0 0 GIC_SPI
117 0x00 0x00 0x00 2 &gic 0 0 GIC_SPI
119 0x00 0x00 0x00 3 &gic 0 0 GIC_SPI
121 0x00 0x00 0x00 4 &gic 0 0 GIC_SPI
[all …]
/Zephyr-latest/dts/arm64/broadcom/
Dviper-a72.dtsi10 #include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
26 interrupt-parent = <&gic>;
38 gic: interrupt-controller@42700000 { label
39 compatible = "arm,gic-v3", "arm,gic";
50 interrupt-parent = <&gic>;
56 interrupt-parent = <&gic>;
62 interrupt-parent = <&gic>;
/Zephyr-latest/soc/ti/k3/am6x/a53/
Dmmu_regions.c13 MMU_REGION_FLAT_ENTRY("GIC",
14 DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 0),
15 DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 0),
18 MMU_REGION_FLAT_ENTRY("GIC",
19 DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 1),
20 DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 1),
/Zephyr-latest/soc/rockchip/rk35/rk3568/
Dmmu_regions.c14 MMU_REGION_FLAT_ENTRY("GIC",
15 DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 0),
16 DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 0),
19 MMU_REGION_FLAT_ENTRY("GIC",
20 DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 1),
21 DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 1),
/Zephyr-latest/soc/nxp/imx/imx9/imx95/a55/
Dmmu_regions.c13 MMU_REGION_FLAT_ENTRY("GIC", DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 0),
14 DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 0),
17 MMU_REGION_FLAT_ENTRY("GIC", DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 1),
18 DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 1),
/Zephyr-latest/dts/bindings/interrupt-controller/
Darm,gic-v3.yaml12 gic: interrupt-controller@2cf00000 {
13 compatible = "arm,gic-v3", "arm,gic";
21 gic: interrupt-controller@2c010000 {
22 compatible = "arm,gic-v3", "arm,gic";
33 compatible: arm,gic-v3
35 include: arm,gic.yaml
/Zephyr-latest/dts/arm64/ti/
Dti_am62x_a53.dtsi10 #include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
42 interrupt-parent = <&gic>;
45 gic: interrupt-controller@1800000 { label
46 compatible = "arm,gic-v3", "arm,gic";
64 interrupt-parent = <&gic>;
75 interrupt-parent = <&gic>;
86 interrupt-parent = <&gic>;
97 interrupt-parent = <&gic>;
108 interrupt-parent = <&gic>;
119 interrupt-parent = <&gic>;
[all …]
/Zephyr-latest/soc/nxp/imx/imx9/imx91/
Dmmu_regions.c12 MMU_REGION_FLAT_ENTRY("GIC", DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 0),
13 DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 0),
16 MMU_REGION_FLAT_ENTRY("GIC", DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 1),
17 DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 1),
/Zephyr-latest/soc/intel/intel_socfpga/agilex/
Dmmu_regions.c29 MMU_REGION_FLAT_ENTRY("GIC",
30 DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 0),
31 DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 0),
34 MMU_REGION_FLAT_ENTRY("GIC",
35 DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 1),
36 DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 1),
/Zephyr-latest/soc/nxp/imx/imx8m/a53/
Dmmu_regions.c13 MMU_REGION_FLAT_ENTRY("GIC",
14 DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 0),
15 DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 0),
18 MMU_REGION_FLAT_ENTRY("GIC",
19 DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 1),
20 DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 1),
/Zephyr-latest/boards/renode/cortex_r8_virtual/support/
Dcortex_r8_virtual.repl3 genericInterruptController: gic
9 gic: IRQControllers.ARM_GenericInterruptController @ {
20 -> gic#0@29
27 -> gic@21
30 [0-2] -> gic@[36-38]
/Zephyr-latest/dts/arm/renesas/rcar/gen3/
Drcar_gen3_cr7.dtsi9 #include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
33 gic: interrupt-controller@f1110000 { label
34 compatible = "arm,gic-v2", "arm,gic";
49 interrupt-parent = <&gic>;
60 interrupt-parent = <&gic>;
80 interrupt-parent = <&gic>;
94 interrupt-parent = <&gic>;
106 interrupt-parent = <&gic>;
119 interrupt-parent = <&gic>;
129 interrupt-parent = <&gic>;
[all …]
/Zephyr-latest/dts/arm/renesas/rcar/gen4/
Drcar_gen4_cr52.dtsi9 #include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
26 interrupt-parent = <&gic>;
38 interrupt-parent = <&gic>;
45 gic: interrupt-controller@f0000000 { label
46 compatible = "arm,gic-v3", "arm,gic";
/Zephyr-latest/dts/arm64/nxp/
Dnxp_mimx93_a55.dtsi11 #include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
47 interrupt-parent = <&gic>;
55 gic: interrupt-controller@48000000 { label
56 compatible = "arm,gic-v3", "arm,gic";
57 reg = <0x48000000 0x10000>, /* GIC Dist */
88 interrupt-parent = <&gic>;
98 interrupt-parent = <&gic>;
108 interrupt-parent = <&gic>;
118 interrupt-parent = <&gic>;
130 interrupt-parent = <&gic>;
[all …]
Dnxp_mimx91.dtsi11 #include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
38 interrupt-parent = <&gic>;
46 gic: interrupt-controller@48000000 { label
47 compatible = "arm,gic-v3", "arm,gic";
48 reg = <0x48000000 0x10000>, /* GIC Dist */
81 interrupt-parent = <&gic>;
91 interrupt-parent = <&gic>;
Dnxp_ls1046a.dtsi8 #include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
40 gic: interrupt-controller@1410000 { label
41 compatible = "arm,gic-v2", "arm,gic";
60 interrupt-parent = <&gic>;
74 interrupt-parent = <&gic>;
Dnxp_mimx8mp_a53.dtsi11 #include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
57 interrupt-parent = <&gic>;
60 gic: interrupt-controller@38800000 { label
61 compatible = "arm,gic-v3", "arm,gic";
62 reg = <0x38800000 0x10000>, /* GIC Dist */
87 interrupt-parent = <&gic>;
100 interrupt-parent = <&gic>;
113 interrupt-parent = <&gic>;
126 interrupt-parent = <&gic>;
139 interrupt-parent = <&gic>;
[all …]
/Zephyr-latest/boards/xen/xenvm/
Dxenvm.dts18 #include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
23 interrupt-parent = <&gic>;
54 gic: interrupt-controller@3001000 { label
55 compatible = "arm,gic-v2", "arm,gic";
67 interrupt-parent = <&gic>;
74 interrupt-parent = <&gic>;
Dxenvm_xenvm_gicv3.dts8 &gic {
9 compatible = "arm,gic-v3", "arm,gic";
/Zephyr-latest/soc/nxp/imx/imx9/imx93/a55/
Dmmu_regions.c13 MMU_REGION_FLAT_ENTRY("GIC", DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 0),
14 DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 0),
17 MMU_REGION_FLAT_ENTRY("GIC", DT_REG_ADDR_BY_IDX(DT_NODELABEL(gic), 1),
18 DT_REG_SIZE_BY_IDX(DT_NODELABEL(gic), 1),
/Zephyr-latest/dts/arm64/intel/
Dintel_socfpga_agilex.dtsi9 #include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
43 gic: interrupt-controller@fffc1000 { label
44 compatible = "arm,gic-v2", "arm,gic";
54 interrupt-parent = <&gic>;
90 interrupt-parent = <&gic>;
110 interrupt-parent = <&gic>;
127 interrupt-parent = <&gic>;
137 interrupt-parent = <&gic>;
147 interrupt-parent = <&gic>;
157 interrupt-parent = <&gic>;
/Zephyr-latest/dts/arm64/renesas/
Drcar_gen3_ca57.dtsi9 #include <dt-bindings/interrupt-controller/arm-gic.h>
24 interrupt-parent = <&gic>;
51 gic: interrupt-controller@f1010000 { label
52 compatible = "arm,gic-400", "arm,gic-v2", "arm,gic" ;
63 interrupt-parent = <&gic>;
81 interrupt-parent = <&gic>;
117 interrupt-parent = <&gic>;
/Zephyr-latest/dts/arm64/rockchip/
Drk3568.dtsi11 #include <zephyr/dt-bindings/interrupt-controller/arm-gic.h>
19 interrupt-parent = <&gic>;
55 gic: interrupt-controller@fd400000 { label
57 compatible = "arm,gic-v3","arm,gic";
77 interrupt-parent = <&gic>;

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