/hal_stm32-3.6.0/.github/workflows/ |
D | test.yml | 7 runs-on: ubuntu-latest 9 fail-fast: false 11 python-version: ['3.7', '3.8', '3.9', '3.10'] 13 - uses: actions/checkout@v1 14 - name: Set up Python 15 uses: actions/setup-python@v1 17 python-version: ${{ matrix.python-version }} 18 - name: install dependencies 20 pip3 install -r scripts/requirements.txt 21 pip3 install -r scripts/requirements-test.txt [all …]
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/hal_stm32-3.6.0/stm32cube/stm32h5xx/soc/ |
D | stm32h573xx.h | 8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripheral’s registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 53 /* ======================================= ARM Cortex-M33 Specific Interrupt Numbers ============… 54 …Reset_IRQn = -15, /*!< -15 Reset Vector, invoked on Power up and warm reset … 55 …NonMaskableInt_IRQn = -14, /*!< -14 Non maskable Interrupt, cannot be stopped or preempte… 56 …HardFault_IRQn = -13, /*!< -13 Hard Fault, all classes of Fault … 57 …MemoryManagement_IRQn = -12, /*!< -12 Memory Management, MPU mismatch, including Access Vio… 59 …BusFault_IRQn = -11, /*!< -11 Bus Fault, Pre-Fetch-, Memory Access Fault, other add… [all …]
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D | stm32h563xx.h | 8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripheral’s registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 53 /* ======================================= ARM Cortex-M33 Specific Interrupt Numbers ============… 54 …Reset_IRQn = -15, /*!< -15 Reset Vector, invoked on Power up and warm reset … 55 …NonMaskableInt_IRQn = -14, /*!< -14 Non maskable Interrupt, cannot be stopped or preempte… 56 …HardFault_IRQn = -13, /*!< -13 Hard Fault, all classes of Fault … 57 …MemoryManagement_IRQn = -12, /*!< -12 Memory Management, MPU mismatch, including Access Vio… 59 …BusFault_IRQn = -11, /*!< -11 Bus Fault, Pre-Fetch-, Memory Access Fault, other add… [all …]
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D | stm32h562xx.h | 8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripheral’s registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 53 /* ======================================= ARM Cortex-M33 Specific Interrupt Numbers ============… 54 …Reset_IRQn = -15, /*!< -15 Reset Vector, invoked on Power up and warm reset … 55 …NonMaskableInt_IRQn = -14, /*!< -14 Non maskable Interrupt, cannot be stopped or preempte… 56 …HardFault_IRQn = -13, /*!< -13 Hard Fault, all classes of Fault … 57 …MemoryManagement_IRQn = -12, /*!< -12 Memory Management, MPU mismatch, including Access Vio… 59 …BusFault_IRQn = -11, /*!< -11 Bus Fault, Pre-Fetch-, Memory Access Fault, other add… [all …]
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D | stm32h503xx.h | 8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripheral’s registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 53 /* ======================================= ARM Cortex-M33 Specific Interrupt Numbers ============… 54 …Reset_IRQn = -15, /*!< -15 Reset Vector, invoked on Power up and warm reset … 55 …NonMaskableInt_IRQn = -14, /*!< -14 Non maskable Interrupt, cannot be stopped or preempte… 56 …HardFault_IRQn = -13, /*!< -13 Hard Fault, all classes of Fault … 57 …MemoryManagement_IRQn = -12, /*!< -12 Memory Management, MPU mismatch, including Access Vio… 59 …BusFault_IRQn = -11, /*!< -11 Bus Fault, Pre-Fetch-, Memory Access Fault, other add… [all …]
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/hal_stm32-3.6.0/stm32cube/stm32h7xx/soc/ |
D | stm32h742xx.h | 8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripheral's registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 50 /****** Cortex-M Processor Exceptions Numbers ****************************************************… 51 …NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt … 52 …HardFault_IRQn = -13, /*!< 3 Cortex-M Hard Fault Interrupt … 53 …MemoryManagement_IRQn = -12, /*!< 4 Cortex-M Memory Management Interrupt … 54 …BusFault_IRQn = -11, /*!< 5 Cortex-M Bus Fault Interrupt … 55 …UsageFault_IRQn = -10, /*!< 6 Cortex-M Usage Fault Interrupt … [all …]
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D | stm32h755xx.h | 8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripheral's registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 50 /****** Cortex-M Processor Exceptions Numbers ****************************************************… 51 …NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt … 52 …HardFault_IRQn = -13, /*!< 3 Cortex-M Hard Fault Interrupt … 53 …MemoryManagement_IRQn = -12, /*!< 4 Cortex-M Memory Management Interrupt … 54 …BusFault_IRQn = -11, /*!< 5 Cortex-M Bus Fault Interrupt … 55 …UsageFault_IRQn = -10, /*!< 6 Cortex-M Usage Fault Interrupt … [all …]
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D | stm32h745xg.h | 8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripheral's registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 50 /****** Cortex-M Processor Exceptions Numbers ****************************************************… 51 …NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt … 52 …HardFault_IRQn = -13, /*!< 3 Cortex-M Hard Fault Interrupt … 53 …MemoryManagement_IRQn = -12, /*!< 4 Cortex-M Memory Management Interrupt … 54 …BusFault_IRQn = -11, /*!< 5 Cortex-M Bus Fault Interrupt … 55 …UsageFault_IRQn = -10, /*!< 6 Cortex-M Usage Fault Interrupt … [all …]
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D | stm32h745xx.h | 8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripheral's registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 50 /****** Cortex-M Processor Exceptions Numbers ****************************************************… 51 …NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt … 52 …HardFault_IRQn = -13, /*!< 3 Cortex-M Hard Fault Interrupt … 53 …MemoryManagement_IRQn = -12, /*!< 4 Cortex-M Memory Management Interrupt … 54 …BusFault_IRQn = -11, /*!< 5 Cortex-M Bus Fault Interrupt … 55 …UsageFault_IRQn = -10, /*!< 6 Cortex-M Usage Fault Interrupt … [all …]
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D | stm32h753xx.h | 8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripheral's registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 50 /****** Cortex-M Processor Exceptions Numbers ****************************************************… 51 …NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt … 52 …HardFault_IRQn = -13, /*!< 3 Cortex-M Hard Fault Interrupt … 53 …MemoryManagement_IRQn = -12, /*!< 4 Cortex-M Memory Management Interrupt … 54 …BusFault_IRQn = -11, /*!< 5 Cortex-M Bus Fault Interrupt … 55 …UsageFault_IRQn = -10, /*!< 6 Cortex-M Usage Fault Interrupt … [all …]
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D | stm32h750xx.h | 8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripheral's registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 50 /****** Cortex-M Processor Exceptions Numbers ****************************************************… 51 …NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt … 52 …HardFault_IRQn = -13, /*!< 3 Cortex-M Hard Fault Interrupt … 53 …MemoryManagement_IRQn = -12, /*!< 4 Cortex-M Memory Management Interrupt … 54 …BusFault_IRQn = -11, /*!< 5 Cortex-M Bus Fault Interrupt … 55 …UsageFault_IRQn = -10, /*!< 6 Cortex-M Usage Fault Interrupt … [all …]
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D | stm32h743xx.h | 8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripheral's registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 50 /****** Cortex-M Processor Exceptions Numbers ****************************************************… 51 …NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt … 52 …HardFault_IRQn = -13, /*!< 3 Cortex-M Hard Fault Interrupt … 53 …MemoryManagement_IRQn = -12, /*!< 4 Cortex-M Memory Management Interrupt … 54 …BusFault_IRQn = -11, /*!< 5 Cortex-M Bus Fault Interrupt … 55 …UsageFault_IRQn = -10, /*!< 6 Cortex-M Usage Fault Interrupt … [all …]
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/hal_stm32-3.6.0/stm32cube/stm32wlxx/soc/ |
D | stm32wle4xx.h | 10 * - Data structures and the address mapping for all peripherals 11 * - Peripheral's registers declarations and bits definition 12 * - Macros to access peripheral's registers hardware 17 * Copyright (c) 2020-2021 STMicroelectronics. 22 * If no LICENSE file comes with this software, it is provided AS-IS. 55 /****** Cortex-M4 Processor Exceptions Numbers ***************************************************… 56 …NonMaskableInt_IRQn = -14, /*!< Non Maskable Interrupt … 57 …HardFault_IRQn = -13, /*!< Cortex-M4 Hard Fault Interrupt … 58 …MemoryManagement_IRQn = -12, /*!< Cortex-M4 Memory Management Interrupt … 59 …BusFault_IRQn = -11, /*!< Cortex-M4 Bus Fault Interrupt … [all …]
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D | stm32wle5xx.h | 10 * - Data structures and the address mapping for all peripherals 11 * - Peripheral's registers declarations and bits definition 12 * - Macros to access peripheral's registers hardware 17 * Copyright (c) 2020-2021 STMicroelectronics. 22 * If no LICENSE file comes with this software, it is provided AS-IS. 55 /****** Cortex-M4 Processor Exceptions Numbers ***************************************************… 56 …NonMaskableInt_IRQn = -14, /*!< Non Maskable Interrupt … 57 …HardFault_IRQn = -13, /*!< Cortex-M4 Hard Fault Interrupt … 58 …MemoryManagement_IRQn = -12, /*!< Cortex-M4 Memory Management Interrupt … 59 …BusFault_IRQn = -11, /*!< Cortex-M4 Bus Fault Interrupt … [all …]
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D | stm32wl54xx.h | 10 * - Data structures and the address mapping for all peripherals 11 * - Peripheral's registers declarations and bits definition 12 * - Macros to access peripheral's registers hardware 17 * Copyright (c) 2020-2021 STMicroelectronics. 22 * If no LICENSE file comes with this software, it is provided AS-IS. 57 …/****** Cortex-M0 Processor Exceptions Numbers **************************************************… 58 …NonMaskableInt_IRQn = -14, /*!< Non Maskable Interrupt … 59 …HardFault_IRQn = -13, /*!< Cortex-M0+ Hard Fault Interrupt … 60 …SVCall_IRQn = -5, /*!< Cortex-M0+ SV Call Interrupt … 61 …PendSV_IRQn = -2, /*!< Cortex-M0+ Pend SV Interrupt … [all …]
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D | stm32wl55xx.h | 10 * - Data structures and the address mapping for all peripherals 11 * - Peripheral's registers declarations and bits definition 12 * - Macros to access peripheral's registers hardware 17 * Copyright (c) 2020-2021 STMicroelectronics. 22 * If no LICENSE file comes with this software, it is provided AS-IS. 57 …/****** Cortex-M0 Processor Exceptions Numbers **************************************************… 58 …NonMaskableInt_IRQn = -14, /*!< Non Maskable Interrupt … 59 …HardFault_IRQn = -13, /*!< Cortex-M0+ Hard Fault Interrupt … 60 …SVCall_IRQn = -5, /*!< Cortex-M0+ SV Call Interrupt … 61 …PendSV_IRQn = -2, /*!< Cortex-M0+ Pend SV Interrupt … [all …]
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D | stm32wl5mxx.h | 10 * - Data structures and the address mapping for all peripherals 11 * - Peripheral's registers declarations and bits definition 12 * - Macros to access peripheral's registers hardware 17 * Copyright (c) 2020-2021 STMicroelectronics. 22 * If no LICENSE file comes with this software, it is provided AS-IS. 57 …/****** Cortex-M0 Processor Exceptions Numbers **************************************************… 58 …NonMaskableInt_IRQn = -14, /*!< Non Maskable Interrupt … 59 …HardFault_IRQn = -13, /*!< Cortex-M0+ Hard Fault Interrupt … 60 …SVCall_IRQn = -5, /*!< Cortex-M0+ SV Call Interrupt … 61 …PendSV_IRQn = -2, /*!< Cortex-M0+ Pend SV Interrupt … [all …]
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/hal_stm32-3.6.0/stm32cube/stm32u5xx/soc/ |
D | stm32u535xx.h | 8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripheral's registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 53 /* ======================================= ARM Cortex-M33 Specific Interrupt Numbers ============… 54 …Reset_IRQn = -15, /*!< -15 Reset Vector, invoked on Power up and warm reset … 55 …NonMaskableInt_IRQn = -14, /*!< -14 Non maskable Interrupt, cannot be stopped or preempte… 56 …HardFault_IRQn = -13, /*!< -13 Hard Fault, all classes of Fault … 57 …MemoryManagement_IRQn = -12, /*!< -12 Memory Management, MPU mismatch, including Access Vio… 59 …BusFault_IRQn = -11, /*!< -11 Bus Fault, Pre-Fetch-, Memory Access Fault, other add… [all …]
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D | stm32u585xx.h | 8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripheral's registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 53 /* ======================================= ARM Cortex-M33 Specific Interrupt Numbers ============… 54 …Reset_IRQn = -15, /*!< -15 Reset Vector, invoked on Power up and warm reset … 55 …NonMaskableInt_IRQn = -14, /*!< -14 Non maskable Interrupt, cannot be stopped or preempte… 56 …HardFault_IRQn = -13, /*!< -13 Hard Fault, all classes of Fault … 57 …MemoryManagement_IRQn = -12, /*!< -12 Memory Management, MPU mismatch, including Access Vio… 59 …BusFault_IRQn = -11, /*!< -11 Bus Fault, Pre-Fetch-, Memory Access Fault, other add… [all …]
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D | stm32u595xx.h | 8 * - Data structures and the address mapping for all peripherals 9 * - Peripheral's registers declarations and bits definition 10 * - Macros to access peripheral's registers hardware 20 * If no LICENSE file comes with this software, it is provided AS-IS. 53 /* ======================================= ARM Cortex-M33 Specific Interrupt Numbers ============… 54 …Reset_IRQn = -15, /*!< -15 Reset Vector, invoked on Power up and warm reset … 55 …NonMaskableInt_IRQn = -14, /*!< -14 Non maskable Interrupt, cannot be stopped or preempte… 56 …HardFault_IRQn = -13, /*!< -13 Hard Fault, all classes of Fault … 57 …MemoryManagement_IRQn = -12, /*!< -12 Memory Management, MPU mismatch, including Access Vio… 59 …BusFault_IRQn = -11, /*!< -11 Bus Fault, Pre-Fetch-, Memory Access Fault, other add… [all …]
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/hal_stm32-3.6.0/stm32cube/stm32wbxx/soc/ |
D | stm32wb30xx.h | 10 * - Data structures and the address mapping for all peripherals 11 * - Peripheral's registers declarations and bits definition 12 * - Macros to access peripheral's registers hardware 17 * Copyright (c) 2019-2022 STMicroelectronics. 22 * If no LICENSE file comes with this software, it is provided AS-IS. 46 * @brief Configuration of the Cortex-M4 Processor and Core Peripherals 69 …/****** Cortex-M4 Processor Exceptions Numbers **************************************************… 70 …NonMaskableInt_IRQn = -14, /*!< Non Maskable Interrupt … 71 …HardFault_IRQn = -13, /*!< Cortex-M4 Hard Fault Interrupt … 72 …MemoryManagement_IRQn = -12, /*!< Cortex-M4 Memory Management Interrupt … [all …]
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D | stm32wb50xx.h | 10 * - Data structures and the address mapping for all peripherals 11 * - Peripheral's registers declarations and bits definition 12 * - Macros to access peripheral's registers hardware 17 * Copyright (c) 2019-2022 STMicroelectronics. 22 * If no LICENSE file comes with this software, it is provided AS-IS. 46 * @brief Configuration of the Cortex-M4 Processor and Core Peripherals 69 …/****** Cortex-M4 Processor Exceptions Numbers **************************************************… 70 …NonMaskableInt_IRQn = -14, /*!< Non Maskable Interrupt … 71 …HardFault_IRQn = -13, /*!< Cortex-M4 Hard Fault Interrupt … 72 …MemoryManagement_IRQn = -12, /*!< Cortex-M4 Memory Management Interrupt … [all …]
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D | stm32wb1mxx.h | 10 * - Data structures and the address mapping for all peripherals 11 * - Peripheral's registers declarations and bits definition 12 * - Macros to access peripheral's registers hardware 17 * Copyright (c) 2019-2022 STMicroelectronics. 22 * If no LICENSE file comes with this software, it is provided AS-IS. 46 * @brief Configuration of the Cortex-M4 Processor and Core Peripherals 69 …/****** Cortex-M4 Processor Exceptions Numbers **************************************************… 70 …NonMaskableInt_IRQn = -14, /*!< Non Maskable Interrupt … 71 …HardFault_IRQn = -13, /*!< Cortex-M4 Hard Fault Interrupt … 72 …MemoryManagement_IRQn = -12, /*!< Cortex-M4 Memory Management Interrupt … [all …]
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/hal_stm32-3.6.0/stm32cube/stm32wbxx/soc/Include/ |
D | stm32wb15xx.h | 10 * - Data structures and the address mapping for all peripherals 11 * - Peripheral's registers declarations and bits definition 12 * - Macros to access peripheral's registers hardware 17 * Copyright (c) 2019-2022 STMicroelectronics. 22 * If no LICENSE file comes with this software, it is provided AS-IS. 46 * @brief Configuration of the Cortex-M4 Processor and Core Peripherals 69 …/****** Cortex-M4 Processor Exceptions Numbers **************************************************… 70 …NonMaskableInt_IRQn = -14, /*!< Non Maskable Interrupt … 71 …HardFault_IRQn = -13, /*!< Cortex-M4 Hard Fault Interrupt … 72 …MemoryManagement_IRQn = -12, /*!< Cortex-M4 Memory Management Interrupt … [all …]
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D | stm32wb10xx.h | 10 * - Data structures and the address mapping for all peripherals 11 * - Peripheral's registers declarations and bits definition 12 * - Macros to access peripheral's registers hardware 17 * Copyright (c) 2019-2022 STMicroelectronics. 22 * If no LICENSE file comes with this software, it is provided AS-IS. 46 * @brief Configuration of the Cortex-M4 Processor and Core Peripherals 69 …/****** Cortex-M4 Processor Exceptions Numbers **************************************************… 70 …NonMaskableInt_IRQn = -14, /*!< Non Maskable Interrupt … 71 …HardFault_IRQn = -13, /*!< Cortex-M4 Hard Fault Interrupt … 72 …MemoryManagement_IRQn = -12, /*!< Cortex-M4 Memory Management Interrupt … [all …]
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