Searched full:composed (Results 1 – 25 of 41) sorted by relevance
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/Zephyr-latest/dts/bindings/ipc/ |
D | zephyr,ipc-openamp-static-vrings.yaml | 35 WQ priority for the instance. This property is an array composed by the
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/Zephyr-latest/dts/bindings/test/ |
D | vnd,pinctrl-test.yaml | 13 Test pin controller pin configuration nodes. Each node is composed by one or
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/Zephyr-latest/samples/subsys/llext/edk/ |
D | README.rst | 12 Kit). It is composed of one Zephyr application, which provides APIs for the 16 The application is composed of a subscriber thread, which listens for events
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/Zephyr-latest/samples/tfm_integration/psa_crypto/src/ |
D | psa_attestation.h | 32 * The initial attestation token (IAT) is composed of a series of 'claims' or
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/Zephyr-latest/doc/hardware/peripherals/sensor/ |
D | index.rst | 25 to understand. Sensors in Zephyr are composed of :ref:`sensor-channel`,
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/Zephyr-latest/dts/bindings/pinctrl/ |
D | espressif,esp32-pinctrl.yaml | 7 states are composed by groups of pre-defined pin muxing definitions and user
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/Zephyr-latest/boards/phytec/phyboard_lyra/doc/ |
D | phyboard_lyra_am62xx_a53.rst | 10 processor, composed of a quad Cortex®-A53 cluster and a single Cortex®-M4 core.
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D | phyboard_lyra_am62xx_m4.rst | 28 The phyBOARD-Lyra AM62x kit features the AM62x SoC, which is composed of a
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/Zephyr-latest/dts/bindings/memory-controllers/ |
D | atmel,sam-smc.yaml | 38 7 pulses (56ns). The atmel,smc-cycle-timing is composed of three parts:
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/Zephyr-latest/include/zephyr/crypto/ |
D | cipher.h | 93 /* CTR mode counter is a split counter composed of iv and counter
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/Zephyr-latest/include/zephyr/arch/arm64/ |
D | arm_mmu.h | 199 * is an uint32_t composed by permission and attribute flags
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/Zephyr-latest/dts/bindings/qspi/ |
D | nxp,s32-qspi.yaml | 88 In case of Octal DDR mode, specifies whether a word unit composed of two
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/Zephyr-latest/boards/ti/sk_am62/doc/ |
D | index.rst | 19 The SK-AM62 EVM features the AM62x SoC, which is composed of a quad Cortex-A53
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/Zephyr-latest/boards/phytec/phyboard_electra/doc/ |
D | index.rst | 28 The AM64x phyBOARD-Electra kit features the AM64x SoC, which is composed of a
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/Zephyr-latest/boards/nxp/imx8mn_evk/doc/ |
D | index.rst | 7 processor, composed of a quad Cortex®-A53 cluster and a single Cortex®-M7 core.
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/Zephyr-latest/subsys/usb/usb_c/ |
D | usbc_stack.h | 21 * @brief Each layer of the stack is composed of state machines that can be
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/Zephyr-latest/boards/technexion/pico_pi/doc/ |
D | index.rst | 6 The i.MX7D SoC is a Hybrid multi-core processor composed of Single Cortex A7 14 The Pico-Pi Platform is composed of a CPU and IO board.
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/Zephyr-latest/boards/element14/warp7/doc/ |
D | index.rst | 6 The i.MX7S SoC is a Hybrid multi-core processor composed of Single Cortex A7 14 The WaRP7 Platform is composed of a CPU and IO board.
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/Zephyr-latest/include/zephyr/arch/riscv/ |
D | arch.h | 195 * is an uint8_t composed by configuration register flags
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/Zephyr-latest/boards/phytec/phyboard_nash/doc/ |
D | index.rst | 15 i.MX93 MPU is composed of one cluster of 2x Cortex-A55 cores and a single
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/Zephyr-latest/boards/96boards/avenger96/doc/ |
D | index.rst | 10 multi-core processor, composed of a dual Cortex®-A7 and a single Cortex®-M4
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/Zephyr-latest/boards/nxp/imx8mq_evk/doc/ |
D | index.rst | 7 processor, composed of a quad Cortex®-A53 cluster and a single Cortex®-M4 core.
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/Zephyr-latest/scripts/ci/ |
D | upload_test_results_es.py | 333 … "This name value will be composed instead of the container's name 'children' and\n"
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/Zephyr-latest/doc/services/logging/ |
D | cs_stm.rst | 94 of data is composed by STM and send over TPIU.
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/Zephyr-latest/boards/st/stm32mp157c_dk2/doc/ |
D | stm32mp157_dk2.rst | 7 multi-core processor,composed of a dual Cortex®-A7 and a single Cortex®-M4 core.
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