1.. zephyr:board:: pico_pi
2
3Overview
4********
5
6The i.MX7D SoC is a Hybrid multi-core processor composed of Single Cortex A7
7core and Single Cortex M4 core.
8Zephyr was ported to run on the M4 core. In a later release, it will also
9communicate with the A7 core (running Linux) via RPmsg.
10
11Hardware
12********
13
14The Pico-Pi Platform is composed of a CPU and IO board.
15
16Pico-Pi IO Board
17================
18- S1 - On/Off (MX7_ONOFF signal)
19- Board to board connector : Edison compatible connector (70 configurable pins)
20- mikroBUS expansion connector ADC, GPIO, I²C, PWM, SPI, UART)
21- 10-pin needle JTAG Connector
22- Debug USB exposing One UART
23- MIPI DSI 1 lane Connector
24- LCD Touch Connector
25- Audio Jack: Mic and Stereo Headphone
26
27Pico-Pi CPU Board
28=================
29
30- CPU i.MX7 Dual with a Single Cortex A7 (1 GHz) core and
31  Single Cortex M4 (200MHz) core
32- Memory
33
34  - RAM -> A7: 4GB
35  - RAM -> M4: 3x32KB (TCML, TCMU, OCRAM_S), 1x128KB (OCRAM) and 1x256MB (DDR)
36  - Flash -> A7: 8GB eMMC
37
38For more information about the i.MX7 SoC and Pico-Pi i.MX7D, see these references:
39
40- `i.MX 7 Series Website`_
41- `i.MX 7 Dual Datasheet`_
42- `i.MX 7 Dual Reference Manual`_
43
44Supported Features
45==================
46
47The Pico-Pi i.MX7D configuration supports the following hardware features on the
48Cortex M4 Core:
49
50+-----------+------------+-------------------------------------+
51| Interface | Controller | Driver/Component                    |
52+===========+============+=====================================+
53| NVIC      | on-chip    | nested vector interrupt controller  |
54+-----------+------------+-------------------------------------+
55| SYSTICK   | on-chip    | systick                             |
56+-----------+------------+-------------------------------------+
57| GPIO      | on-chip    | gpio                                |
58+-----------+------------+-------------------------------------+
59| I2C       | on-chip    | i2c                                 |
60+-----------+------------+-------------------------------------+
61| UART      | on-chip    | serial port-polling;                |
62|           |            | serial port-interrupt               |
63+-----------+------------+-------------------------------------+
64
65The default configuration can be found in the defconfig file:
66:zephyr_file:`boards/technexion/pico_pi/pico_pi_mcimx7d_m4_defconfig`
67
68Other hardware features are not currently supported by the port.
69
70Connections and IOs
71===================
72
73The Pico-Pi board Board was tested with the following pinmux controller
74configuration.
75
76+---------------+---------------------+--------------------------------+
77| Board Name    | SoC Name            | Usage                          |
78+===============+=====================+================================+
79| UART_TX232    | UART1_TX            | UART Console                   |
80+---------------+---------------------+--------------------------------+
81| UART_RX232    | UART1_RX            | UART Console                   |
82+---------------+---------------------+--------------------------------+
83| RX_E          | UART6_TX            | UART (mikroBUS and Edison)     |
84+---------------+---------------------+--------------------------------+
85| TX_E          | UART6_RX            | UART (mikroBUS and Edison)     |
86+---------------+---------------------+--------------------------------+
87| I2CX_SDA_3V   | I2C1_SDA            | I2C (mikroBUS and Edison)      |
88+---------------+---------------------+--------------------------------+
89| I2CX_SCL_3V   | I2C1_SCL            | I2C (mikroBUS and Edison)      |
90+---------------+---------------------+--------------------------------+
91
92System Clock
93============
94
95The M4 Core is configured to run at a 200 MHz clock speed.
96
97Serial Port
98===========
99
100The iMX7D SoC has seven UARTs. The number 6 is configured for the console and
101the number 2 is used in the mikroBUS connector.
102
103Programming and Debugging
104*************************
105
106The Pico-Pi i.MX7D doesn't have QSPI flash for the M4 and it needs to be started by
107the A7 core. The A7 core is responsible to load the M4 binary application into
108the RAM, put the M4 in reset, set the M4 Program Counter and Stack Pointer, and
109get the M4 out of reset.
110The A7 can perform these steps at bootloader level or after the Linux system
111has booted.
112
113The M4 can use up to 5 different RAMs. These are the memory mapping for A7 and
114M4:
115
116+------------+-----------------------+------------------------+-----------------------+----------------------+
117| Region     | Cortex-A7             | Cortex-M4 (System Bus) | Cortex-M4 (Code Bus)  | Size                 |
118+============+=======================+========================+=======================+======================+
119| DDR        | 0x80000000-0xFFFFFFFF | 0x80000000-0xDFFFFFFF  | 0x10000000-0x1FFEFFFF | 2048MB (less for M4) |
120+------------+-----------------------+------------------------+-----------------------+----------------------+
121| OCRAM      | 0x00900000-0x0091FFFF | 0x20200000-0x2021FFFF  | 0x00900000-0x0091FFFF | 128KB                |
122+------------+-----------------------+------------------------+-----------------------+----------------------+
123| TCMU       | 0x00800000-0x00807FFF | 0x20000000-0x20007FFF  |                       | 32KB                 |
124+------------+-----------------------+------------------------+-----------------------+----------------------+
125| TCML       | 0x007F8000-0x007FFFFF |                        | 0x1FFF8000-0x1FFFFFFF | 32KB                 |
126+------------+-----------------------+------------------------+-----------------------+----------------------+
127| OCRAM_S    | 0x00180000-0x00187FFF | 0x20180000-0x20187FFF  | 0x00000000-0x00007FFF | 32KB                 |
128+------------+-----------------------+------------------------+-----------------------+----------------------+
129
130References
131==========
132
133- `i.MX 7 Dual Reference Manual`_ from page 182 (section 2.1.2 and 2.1.3)
134- `Toradex Wiki`_
135
136
137At compilation time you have to choose which RAM will be used. This
138configuration is done in the file :zephyr_file:`boards/technexion/pico_pi/pico_pi_mcimx7d_m4.dts` with
139"zephyr,flash" (when CONFIG_XIP=y) and "zephyr,sram" properties. The available
140configurations are:
141
142.. code-block:: none
143
144   "zephyr,flash"
145   - &ddr_code
146   - &tcml_code
147   - &ocram_code
148   - &ocram_s_code
149   - &ocram_pxp_code
150   - &ocram_epdc_code
151
152   "zephyr,sram"
153   - &ddr_sys
154   - &tcmu_sys
155   - &ocram_sys
156   - &ocram_s_sys
157   - &ocram_pxp_sys
158   - &ocram_epdc_sys
159
160
161Below you will find the instructions to load and run Zephyr on M4 from A7 using
162u-boot.
163
164Connect both micro USB interfaces into the PC. This is the A7 console and the
165UART6 in the Edison connector is M4 console for Zephyr with both configured to work at 115200 8N1.
166The USB interface is used to power the CPU and IO boards and is connected
167to the USB OTG interface of the i.MX7D.
168
169After powering up the platform stop the u-boot execution on the A7 core and
170expose the eMMC as mass storage with the following command in the u-boot
171prompt: ``ums 0 mmc 0``. Copy the compiled zephyr.bin to the first FAT
172partition and remove the mounted device on the PC by issuing a "Ctrl+C" in the
173u-boot prompt.
174Set the u-boot environment variables and run the zephyr.bin from the
175appropriated memory configured in the Zephyr compilation:
176
177.. code-block:: console
178
179   setenv bootm4 'fatload mmc 0:1 $m4addr $m4fw && dcache flush && bootaux $m4addr'
180   # TCML
181   setenv m4tcml 'setenv m4fw zephyr.bin; setenv m4addr 0x007F8000'
182   setenv bootm4tcml 'run m4tcml && run bootm4'
183   run bootm4tcml
184   # TCMU
185   setenv m4tcmu 'setenv m4fw zephyr.bin; setenv m4addr 0x00800000'
186   setenv bootm4tcmu 'run m4tcmu && run bootm4'
187   run bootm4tcmu
188   # OCRAM
189   setenv m4ocram 'setenv m4fw zephyr.bin; setenv m4addr 0x00900000'
190   setenv bootm4ocram 'run m4ocram && run bootm4'
191   run bootm4ocram
192   # OCRAM_S
193   setenv m4ocrams 'setenv m4fw zephyr.bin; setenv m4addr 0x00180000'
194   setenv bootm4ocrams 'run m4ocrams && run bootm4'
195   run bootm4ocrams
196   # DDR
197   setenv m4ddr 'setenv m4fw zephyr.bin; setenv m4addr 0x80000000'
198   setenv bootm4ddr 'run m4ddr && run bootm4'
199   run bootm4ddr
200
201:ref:`build_an_application` and :ref:`application_run` for more details).
202
203References
204==========
205
206- `Loading Code on Cortex-M4 from Linux for the i.MX 6SoloX and i.MX 7Dual/7Solo Application Processors`_
207- `J-Link iMX7D Instructions`_
208
209.. _i.MX 7 Series Website:
210   https://www.nxp.com/products/processors-and-microcontrollers/applications-processors/i.mx-applications-processors/i.mx-7-processors:IMX7-SERIES?fsrch=1&sr=1&pageNum=1
211
212.. _i.MX 7 Dual Datasheet:
213   https://www.nxp.com/docs/en/data-sheet/IMX7DCEC.pdf
214
215.. _i.MX 7 Dual Reference Manual:
216   https://www.nxp.com/webapp/Download?colCode=IMX7DRM
217
218.. _J-Link Tools:
219   https://www.segger.com/downloads/jlink/#J-LinkSoftwareAndDocumentationPack
220
221.. _NXP iMX7D Connect CortexM4.JLinkScript:
222   https://wiki.segger.com/images/8/86/NXP_iMX7D_Connect_CortexM4.JLinkScript
223
224.. _Loading Code on Cortex-M4 from Linux for the i.MX 6SoloX and i.MX 7Dual/7Solo Application Processors:
225   https://www.nxp.com/docs/en/application-note/AN5317.pdf
226
227.. _J-Link iMX7D Instructions:
228   https://wiki.segger.com/IMX7D
229
230.. _Toradex Wiki:
231   https://developer.toradex.com/knowledge-base/freertos-on-the-cortex-m4-of-a-colibri-imx7#Memory_areas
232