1.. _phyboard_nash: 2 3phyBOARD-Nash i.MX93 4#################### 5 6Overview 7******** 8 9The phyBOARD-Nash is based on the phyCORE-i.MX93 SoM is based on the NXP i.MX93 10SoC. It features common industrial interfaces and can be used as a reference for 11development or in the final product. It is an entry-level development board, 12which helps developers to get familiar with the module before investing a large 13amount of resources in more specific designs. 14 15i.MX93 MPU is composed of one cluster of 2x Cortex-A55 cores and a single 16Cortex-M33 core. Zephyr OS is ported to run on one of the Cortex-A55 core as 17well as the Cortex-M33 core. 18 19- Memory: 20 21 - RAM: 512 MB - 2GB LPDDR4 22 - EEPROM: 4 kB - 32 kB 23 - eMMC: 8 GB - 256 GB 24 25- Interfaces: 26 27 - Ethernet: 2x 10/100BASE-T (1x TSN Support) 28 - USB: 2x 2.0 Host / OTG 29 - Serial: 1x RS232 / RS485 Full Duplex / Half Duplex 30 - CAN: 1x CAN FD 31 - Digital I/O: via Expansion Connector 32 - MMX/SD/SDIO: microSD slot 33 - Display: LVDS(1x4 or 1x8), MIPI DSI(1x4), HDMI 34 - Audio: SAI 35 - Camera: 1x MIPI CSI-2 (phyCAM-M), 1x Parallel 36 - Expansion Bus: I2C, SPI, SDIO, UART, USB 37 38- Debug: 39 40 - JTAG 10-pin connector 41 - USB-C for UART debug, 2x serial ports for A55 and M33 42 43 44.. image:: img/phyboard_nash.webp 45 :width: 720px 46 :align: center 47 :height: 405px 48 :alt: phyBOARD-Nash 49 50More information about the board can be found at the `PHYTEC website`_. 51 52Supported Features 53================== 54 55The ``phyboard_nash/mimx9352/a55`` board target supports the following hardware 56features: 57 58+-----------+------------+-------------------------------------+ 59| Interface | Controller | Driver/Component | 60+===========+============+=====================================+ 61| GIC-v4 | on-chip | interrupt controller | 62+-----------+------------+-------------------------------------+ 63| ARM TIMER | on-chip | system clock | 64+-----------+------------+-------------------------------------+ 65| CLOCK | on-chip | clock_control | 66+-----------+------------+-------------------------------------+ 67| PINMUX | on-chip | pinmux | 68+-----------+------------+-------------------------------------+ 69| UART | on-chip | serial port | 70+-----------+------------+-------------------------------------+ 71| TPM | on-chip | TPM Counter | 72+-----------+------------+-------------------------------------+ 73 74The ``phyboard_nash/mimx9352/m33`` board target supports the following hardware 75features: 76 77+-----------+------------+-------------------------------------+ 78| Interface | Controller | Driver/Component | 79+===========+============+=====================================+ 80| NVIC | on-chip | interrupt controller | 81+-----------+------------+-------------------------------------+ 82| SYSTICK | on-chip | systick | 83+-----------+------------+-------------------------------------+ 84| CLOCK | on-chip | clock_control | 85+-----------+------------+-------------------------------------+ 86| PINMUX | on-chip | pinmux | 87+-----------+------------+-------------------------------------+ 88| UART | on-chip | serial port | 89+-----------+------------+-------------------------------------+ 90 91Devices 92======== 93System Clock 94------------ 95 96This board configuration uses a system clock frequency of 24 MHz. Cortex-A55 97Core runs up to 1.7 GHz. Cortex-M33 Core runs up to 200MHz in which SYSTICK runs 98on same frequency. 99 100Serial Port 101----------- 102 103This board configuration uses a single serial communication channel with the 104CPU's UART2 for A55 core and M33 core. The u-boot bootloader or Linux use the 105second serial port for debug output. 106 107Programming and Debugging (A55) 108******************************* 109 110Copy the compiled ``zephyr.bin`` to the ``BOOT`` partition of the SD card and 111plug the SD card into the board. Power it up and stop the u-boot execution at 112prompt. 113 114Use U-Boot to load and execute zephyr.bin on Cortex-A55 Core0: 115 116.. code-block:: console 117 118 fatload mmc 1:1 0xd0000000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; go 0xd0000000 119 120 121Use this configuration to run basic Zephyr applications and kernel tests, 122for example: 123 124.. zephyr-app-commands:: 125 :zephyr-app: samples/hello_world 126 :board: phyboard_nash/mimx9352/a55 127 :goals: build 128 129Use this configuration to run basic Zephyr applications, for example: 130 131.. code-block:: console 132 133 *** Booting Zephyr OS build v3.7.0-848-gb4d99b124c6d *** 134 Hello World! phyboard_nash/mimx9352/a55 135 136Programming and Debugging (M33) 137******************************* 138 139Copy the compiled ``zephyr.bin`` to the ``BOOT`` partition of the SD card and 140plug the SD card into the board. Power it up and stop the u-boot execution at 141prompt. 142 143Use U-Boot to load and kick zephyr.bin to Cortex-M33 Core: 144 145.. code-block:: console 146 147 load mmc 1:1 0x80000000 zephyr.bin;cp.b 0x80000000 0x201e0000 0x30000;bootaux 0x1ffe0000 0 148 149Use this configuration to run basic Zephyr applications, for example: 150 151.. zephyr-app-commands:: 152 :zephyr-app: samples/hello_world 153 :board: phyboard_nash/mimx9352/m33 154 :goals: build 155 156This will build an image with the synchronization sample app, boot it and 157display the following console output: 158 159.. code-block:: console 160 161 *** Booting Zephyr OS build v3.7.0-848-gb4d99b124c6d *** 162 Hello World! phyboard_nash/mimx9352/m33 163 164Starting the M7-Core from U-Boot and Linux 165========================================== 166 167Loading binaries and starting the M33-Core is supported from Linux via 168remoteproc. Please check the `phyCORE-i.MX93 BSP Manual`_ for more information. 169 170References 171========== 172 173For more information refer to the `PHYTEC website`_. 174 175.. _PHYTEC website: 176 https://www.phytec.eu/en/produkte/development-kits/phyboard-nash/ 177.. _phyCORE-i.MX93 BSP Manual: 178 https://phytec.github.io/doc-bsp-yocto/bsp/imx9/imx93/imx93.html 179