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/Zephyr-latest/dts/bindings/phy/
Dcan-transceiver-gpio.yaml2 # SPDX-License-Identifier: Apache-2.0
4 description: Simple GPIO controlled CAN transceiver
6 compatible: "can-transceiver-gpio"
8 include: can-transceiver.yaml
11 enable-gpios:
12 type: phandle-array
14 GPIO to use to enable/disable the CAN transceiver. This GPIO is driven
15 active when the CAN transceiver is enabled and inactive when the CAN
16 transceiver is disabled.
18 standby-gpios:
[all …]
/Zephyr-latest/drivers/can/transceiver/
DKconfig1 # CAN transceiver configuration options
4 # SPDX-License-Identifier: Apache-2.0
6 menu "CAN transceiver drivers"
9 int "CAN transceiver driver init priority"
12 CAN transceiver device driver initialization priority.
15 bool "GPIO controlled CAN transceiver"
18 select GPIO
20 Enable support for GPIO controlled CAN transceivers.
Dcan_transceiver_gpio.c4 * SPDX-License-Identifier: Apache-2.0
10 #include <zephyr/drivers/can/transceiver.h>
11 #include <zephyr/drivers/gpio.h>
16 /* Does any devicetree instance have an enable-gpios property? */
20 /* Does any devicetree instance have a standby-gpios property? */
35 const struct can_transceiver_gpio_config *config = dev->config; in can_transceiver_gpio_set_state()
39 if (config->enable_gpio.port != NULL) { in can_transceiver_gpio_set_state()
40 err = gpio_pin_set_dt(&config->enable_gpio, enabled ? 1 : 0); in can_transceiver_gpio_set_state()
42 LOG_ERR("failed to set enable GPIO pin (err %d)", err); in can_transceiver_gpio_set_state()
43 return -EIO; in can_transceiver_gpio_set_state()
[all …]
/Zephyr-latest/dts/bindings/can/
Dcan-controller.yaml1 # Common fields for CAN controllers
6 bus-speed:
19 sample-point:
30 Actively controlled CAN transceiver.
33 transceiver0: can-phy0 {
34 compatible = "nxp,tja1040", "can-transceiver-gpio";
35 standby-gpios = <gpioa 0 GPIO_ACTIVE_HIGH>;
36 max-bitrate = <1000000>;
37 #phy-cells = <0>;
46 child-binding:
[all …]
Dti,tcan4x5x.yaml2 # SPDX-License-Identifier: Apache-2.0
5 Texas Instruments TCAN4x5x SPI CAN FD controller.
9 tcan4x5x: can@0 {
12 spi-max-frequency = <18000000>;
13 clock-frequency = <40000000>;
14 device-state-gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
15 device-wake-gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
16 reset-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
17 int-gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
18 bosch,mram-cfg = <0x0 15 15 5 5 0 10 10>;
[all …]
/Zephyr-latest/drivers/spi/
DKconfig.ambiq6 # SPDX-License-Identifier: Apache-2.0
13 select GPIO
40 select GPIO
47 bool "AMBIQ SPI-BLEIF driver"
55 general IOM module) for SPI transceiver. It is always used for
61 bool "Ambiq SPI-BLEIF timing trace"
63 The pins for the SPI transceiver are not exposed from the chips
66 pins. The user can enable it to configure the pins for timing
/Zephyr-latest/boards/others/candlelightfd/
Dcandlelightfd_stm32g0b1xx_dual.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
15 transceiver1: can-phy1 {
16 compatible = "nxp,tja1051", "can-transceiver-gpio";
17 enable-gpios = <&gpiob 2 GPIO_ACTIVE_LOW>;
18 max-bitrate = <5000000>;
19 #phy-cells = <0>;
26 pinctrl-0 = <&fdcan2_rx_pb0 &fdcan2_tx_pb1>;
27 pinctrl-names = "default";
Dcandlelightfd.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include <st/g0/stm32g0b1r(b-c-e)tx-pinctrl.dtsi>
14 zephyr,code-partition = &slot0_partition;
24 compatible = "gpio-leds";
35 transceiver0: can-phy0 {
36 compatible = "nxp,tja1051", "can-transceiver-gpio";
37 enable-gpios = <&gpioa 15 GPIO_ACTIVE_LOW>;
38 max-bitrate = <5000000>;
39 #phy-cells = <0>;
45 clock-frequency = <DT_FREQ_M(8)>;
[all …]
/Zephyr-latest/boards/shields/tcan4550evm/
Dtcan4550evm.overlay4 * SPDX-License-Identifier: Apache-2.0
7 #include <zephyr/dt-bindings/gpio/gpio.h>
17 cs-gpios = <&arduino_header 16 GPIO_ACTIVE_LOW>; /* D10 */
19 tcan4x5x_tcan4550evm: can@0 {
22 /* reduced spi-max-frequency to accommodate flywire connections */
23 spi-max-frequency = <2000000>;
25 clock-frequency = <40000000>;
26 device-state-gpios = <&arduino_header 12 GPIO_ACTIVE_HIGH>; /* D6 */
27 device-wake-gpios = <&arduino_header 13 GPIO_ACTIVE_HIGH>; /* D7 */
28 reset-gpios = <&arduino_header 14 GPIO_ACTIVE_HIGH>; /* D8 */
[all …]
/Zephyr-latest/dts/bindings/misc/
Dzephyr,swdp-gpio.yaml3 # SPDX-License-Identifier: Apache-2.0
7 implementation by GPIO bit-banging.
9 Schematic using dual-supply bus transceiver and separate dout and dnoe pins
13 | +-------------+ |
14 +-------|vcca vccb|-----+
16 clk-gpios -------|a b|-------------- SWD CLK
18 noe-gpios -------|dir gnd|-----+
19 +-------------+ |
26 | +-------------+ |
27 +-------|vcca vccb|-----+
[all …]
/Zephyr-latest/boards/nxp/mr_canhubk3/
Dmr_canhubk3.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
12 #include <dt-bindings/pwm/pwm.h>
13 #include "mr_canhubk3-pinctrl.dtsi"
14 #include <zephyr/dt-bindings/sensor/qdec_nxp_s32.h>
17 model = "NXP MR-CANHUBK3";
25 zephyr,code-partition = &code_partition;
27 zephyr,shell-uart = &lpuart2;
[all …]
/Zephyr-latest/boards/nxp/ucans32k1sic/
Ducans32k1sic.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
8 #include <zephyr/dt-bindings/gpio/gpio.h>
9 #include <zephyr/dt-bindings/input/input-event-codes.h>
10 #include <zephyr/dt-bindings/pwm/pwm.h>
12 #include "ucans32k1sic-pinctrl.dtsi"
22 zephyr,shell-uart = &lpuart1;
23 zephyr,uart-pipe = &lpuart1;
31 pwm-led0 = &led1_red_pwm;
32 pwm-led1 = &led1_green_pwm;
[all …]
/Zephyr-latest/boards/st/stm32h735g_disco/
Dstm32h735g_disco.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/h7/stm32h735igkx-pinctrl.dtsi>
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
15 compatible = "st,stm32h735g-disco";
19 zephyr,shell-uart = &usart3;
26 compatible = "gpio-leds";
38 compatible = "gpio-keys";
50 volt-sensor1 = &vbat;
55 clock-frequency = <DT_FREQ_M(25)>;
[all …]
/Zephyr-latest/soc/nxp/kinetis/kwx/
Dsoc_kw2xd.c2 * Copyright (c) 2014-2015 Wind River Systems, Inc.
6 * SPDX-License-Identifier: Apache-2.0
33 DT_PROP_OR(CLOCK_NODEID(clk), clock_div, 1) - 1
74 * @brief Initialize radio transceiver clock output
76 * The clock output of the transceiver can be used as an input clock
79 * output of the transceiver at 4 MHz. The default frequency of the CLK_OUT
80 * depends on the state of GPIO5 during transceiver reset. The frequency
87 SIM->SCGC5 |= SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTC_MASK; in set_modem_clock()
88 /* Set PORTB.19 as output - modem RESET pin */ in set_modem_clock()
89 GPIOB->PDDR |= 0x00080000u; in set_modem_clock()
[all …]
/Zephyr-latest/boards/renesas/rcar_h3ulcb/
Drcar_h3ulcb_r8a77951_r7.dts4 * SPDX-License-Identifier: Apache-2.0
8 /dts-v1/;
10 #include "rcar_h3ulcb_r8a77951_r7-pinctrl.dtsi"
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
15 compatible = "renesas,h3ulcb-cr7";
20 zephyr,shell-uart = &scif1;
25 compatible = "gpio-leds";
33 compatible = "gpio-keys";
42 pwm-0 = &pwm0;
50 clock-frequency = <32000>;
[all …]
/Zephyr-latest/boards/atmel/sam0/samc21n_xpro/
Dsamc21n_xpro.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
11 #include "samc21n_xpro-pinctrl.dtsi"
12 #include <zephyr/dt-bindings/input/input-event-codes.h>
20 zephyr,shell-uart = &sercom4;
29 pwm-led0 = &pwm_led0;
31 i2c-0 = &sercom1;
35 compatible = "gpio-leds";
43 compatible = "pwm-leds";
50 compatible = "gpio-keys";
[all …]
/Zephyr-latest/boards/fysetc/ucan/
Ducan.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <st/f0/stm32f072c(8-b)tx-pinctrl.dtsi>
19 zephyr,code-partition = &slot0_partition;
29 compatible = "gpio-leds";
40 transceiver0: can-phy0 {
41 compatible = "can-transceiver-gpio";
42 enable-gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
43 max-bitrate = <1000000>;
44 #phy-cells = <0>;
[all …]
/Zephyr-latest/boards/others/candlelight/
Dcandlelight.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include <st/f0/stm32f072c(8-b)tx-pinctrl.dtsi>
19 zephyr,code-partition = &slot0_partition;
29 compatible = "gpio-leds";
40 transceiver0: can-phy0 {
41 compatible = "nxp,tja1051", "can-transceiver-gpio";
42 enable-gpios = <&gpioc 13 GPIO_ACTIVE_LOW>;
43 max-bitrate = <1000000>;
44 #phy-cells = <0>;
[all …]
/Zephyr-latest/boards/witte/linum/doc/
Dindex.rst8 of communications interfaces like UART with RS232 and RS485 capabillities, CAN bus compatible to
15 - 8 to 52V power supply
16 …- SWD Pins for use as STLink (Pin header) and TC2030-IDC 6-Pin Tag-Connect Plug-of-Nails™ Connector
17 - Crystal for HS 25MHz
18 - Crystal for RTC 32.768KHz
19 - 1 UART serial for debug
20 - 1 Led RGB
21 - 1 Buzzer without internal oscillator
22 - 1 Mono audio up to 3W
23 - 1 Ethernet 10/100
[all …]
/Zephyr-latest/boards/luatos/esp32c3_luatos_core/
Desp32c3_luatos_core.dtsi4 * SPDX-License-Identifier: Apache-2.0
8 #include "esp32c3_luatos_core-pinctrl.dtsi"
9 #include <zephyr/dt-bindings/input/input-event-codes.h>
18 i2c-0 = &i2c0;
25 compatible = "gpio-keys";
34 compatible = "gpio-leds";
49 current-speed = <115200>;
50 pinctrl-0 = <&uart0_default>;
51 pinctrl-names = "default";
56 clock-frequency = <I2C_BITRATE_STANDARD>;
[all …]
/Zephyr-latest/boards/olimex/stm32_p405/
Dolimex_stm32_p405.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <st/f4/stm32f405rgtx-pinctrl.dtsi>
10 #include <zephyr/dt-bindings/input/input-event-codes.h>
13 model = "Olimex STM32-P405 board";
14 compatible = "olimex,stm32-p405";
18 zephyr,shell-uart = &usart2;
26 compatible = "gpio-leds";
34 compatible = "gpio-keys";
53 clock-frequency = <DT_FREQ_M(8)>;
[all …]
/Zephyr-latest/boards/rakwireless/rak11720/doc/
Dindex.rst4 It is based on the powerful ultra-low power Apollo3 Blue SoC (AMA3B1KK-KBR-B0)
5 from Ambiq together with a Semtech SX1262 LoRa® transceiver.
7 The AMA3B1KK-KBR-B0 has an integrated Bluetooth Low Energy transceiver
21 - Apollo3 Blue SoC with up to 96 MHz operating frequency
22 - ARM® Cortex® M4F core
23 - 16 kB 2-way Associative/Direct-Mapped Cache per core
24 - Up to 1 MB of flash memory for code/data
25 - Up to 384 KB of low leakage / low power RAM for code/data
26 - Integrated Bluetooth 5 Low-energy controller
27 - Semtech SX1262 low power high range LoRa transceiver
[all …]
/Zephyr-latest/tests/lib/devicetree/api/
Dapp.overlay4 * SPDX-License-Identifier: Apache-2.0
9 * with real-world devicetree nodes, to allow these tests to run on
15 test-alias = &test_nodelabel;
19 ztest,gpio = &test_nodelabel;
28 #address-cells = < 0x1 >;
29 #size-cells = < 0x1 >;
30 interrupt-parent = <&test_intc>;
32 test_cpu_intc: interrupt-controller {
33 compatible = "vnd,cpu-intc";
34 #address-cells = <0>;
[all …]
/Zephyr-latest/boards/renesas/ek_ra4e2/
Dek_ra4e2.dts3 * SPDX-License-Identifier: Apache-2.0
6 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input-event-codes.h>
11 #include <zephyr/dt-bindings/adc/adc.h>
12 #include "ek_ra4e2-pinctrl.dtsi"
15 model = "Renesas EK-RA4E2";
22 zephyr,shell-uart = &uart0;
28 compatible = "gpio-leds";
44 compatible = "gpio-keys";
[all …]
/Zephyr-latest/boards/olimex/olimex_esp32_evb/
Dolimex_esp32_evb_procpu.dts4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
10 #include "olimex_esp32_evb-pinctrl.dtsi"
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
15 model = "Olimex ESP32-EVB";
16 compatible = "olimex,esp32-evb", "espressif,esp32-wroom-32e", "espressif,esp32";
20 zephyr,shell-uart = &uart0;
23 zephyr,code-partition = &slot0_partition;
24 zephyr,bt-hci = &esp32_bt_hci;
33 compatible = "gpio-keys";
[all …]

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