Searched full:pue (Results 1 – 10 of 10) sorted by relevance
| /Zephyr-latest/dts/bindings/pinctrl/ |
| D | nxp,mcux-rt11xx-pinctrl.yaml | 27 bias-pull-down: PUE=1, PUS=0
28 bias-pull-up: PUE=1, PUS=1
37 PUE=0
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| D | nxp,imx8mp-pinctrl.yaml | 27 bias-pull-up: PUE=1, PE=1
28 bias-pull-down: PUE=0, PE=1
38 PUE=0
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| D | nxp,mcux-rt-pinctrl.yaml | 29 bias-pull-down: PUE=1, PUS=<bias-pull-down-value>
30 bias-pull-up: PUE=1, PUS=<bias-pull-up-value>
41 PUE=0,
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| D | nxp,imx8m-pinctrl.yaml | 27 bias-pull-up: PUE=1
37 PUE=0,
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| D | nxp,imx-iomuxc.yaml | 51 pin-pue:
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| /Zephyr-latest/drivers/gpio/ |
| D | gpio_sifive.c | 32 unsigned int pue; member
159 WRITE_BIT(gpio->pue, pin, flags & GPIO_PULL_UP); in gpio_sifive_config()
340 gpio->pue = 0U; in gpio_sifive_init()
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| D | gpio_mcux_rgpio.c | 77 /* PUE/PDRV types have the same ODE bit */ in mcux_rgpio_configure()
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| D | gpio_mcux_igpio.c | 105 /* PUE type register layout (GPIO_AD pins) */ in mcux_igpio_configure()
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| /Zephyr-latest/soc/nxp/imxrt/imxrt118x/ |
| D | pinctrl_soc.h | 79 uint8_t pue_mux: 1; /* Is pinmux reg pue type */
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| /Zephyr-latest/soc/nxp/imxrt/imxrt11xx/ |
| D | pinctrl_soc.h | 102 uint8_t pue_mux: 1; /* Is pinmux reg pue type */
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