Searched full:ode (Results 1 – 10 of 10) sorted by relevance
| /Zephyr-latest/drivers/gpio/ |
| D | gpio_mcux_igpio.c | 85 /* Set ODE bit */ in mcux_igpio_configure()
107 /* Set ODE bit */ in mcux_igpio_configure()
137 /* PDRV/SNVS/LPSR reg have different ODE bits */ in mcux_igpio_configure()
140 /* Set ODE bit */ in mcux_igpio_configure()
147 /* Set ODE bit */ in mcux_igpio_configure()
154 /* Set ODE bit */ in mcux_igpio_configure()
165 /* Set ODE bit */ in mcux_igpio_configure()
179 /* Set ODE bit */ in mcux_igpio_configure()
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| D | gpio_mcux_rgpio.c | 77 /* PUE/PDRV types have the same ODE bit */ in mcux_rgpio_configure()
79 /* Set ODE bit */ in mcux_rgpio_configure()
111 /* Set ODE bit */ in mcux_rgpio_configure()
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| D | gpio_imx.c | 55 /* Set ODE bit */ in imx_gpio_configure()
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| D | gpio_mcux_lpc.c | 100 /* Set ODE bit. */ in gpio_mcux_lpc_configure()
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| /Zephyr-latest/soc/nxp/imxrt/imxrt118x/ |
| D | pinctrl_soc.h | 35 * pue_pus: registers have a slew rate and ode field
36 * pue_pus_lpsr: in low power state retention domain, shifted ode field
37 * pue_pus_snvs: in SNVS domain, shifted ode field
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| /Zephyr-latest/dts/bindings/pinctrl/ |
| D | nxp,mcux-rt11xx-pinctrl.yaml | 25 drive-open-drain: ODE/ODE_LPSR=1
35 ODE=0
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| D | nxp,imx8mp-pinctrl.yaml | 29 drive-open-drain: ODE=1
39 ODE=0,
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| D | nxp,imx8m-pinctrl.yaml | 28 drive-open-drain: ODE=1
38 ODE=0,
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| D | nxp,mcux-rt-pinctrl.yaml | 27 drive-open-drain: ODE=1
39 ODE=0,
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| /Zephyr-latest/soc/nxp/imxrt/imxrt11xx/ |
| D | pinctrl_soc.h | 37 * pue_pus: registers have a slew rate and ode field
38 * pue_pus_lpsr: in low power state retention domain, shifted ode field
39 * pue_pus_snvs: in SNVS domain, shifted ode field
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