| /Zephyr-latest/arch/xtensa/core/ |
| D | README_WINDOWS.rst | 13 visible as A0-A15.
15 The first quad (A0-A3) is pointed to by a special register called
18 (respectively) A0-A3, A4-A7, A8-A11, and A12-A15.
22 Positive rotations "move" high registers into low registers
24 A0).
27 which rotate registers upward (i.e. "hiding" low registers from the
30 (yes, two; see below): the 2-bit CALLINC field of the PS register, and
31 the top two bits of the return address placed in A0.
39 top two bits from the return address in A0 and subtracts that value
61 being brought into A0-A3 (i.e. the new WINDOWBASE) has a set bit
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| D | userspace.S | 4 * SPDX-License-Identifier: Apache-2.0
13 #include <xtensa/config/core-isa.h>
17 * -------------- ----------------------------------
29 movi a0, xtensa_is_user_context_epc
31 bne a0, a2, _not_checking_user_context
36 movi a0, PS_RING_MASK
38 and a2, a2, a0
49 rsr a0, ZSR_A0SAVE
56 rsr a0, ZSR_CPU
57 l32i a0, a0, ___cpu_t_current_OFFSET
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| D | crt1.S | 3 * SPDX-License-Identifier: Apache-2.0
53 * _start is typically NOT at the beginning of the text segment --
58 * - low (level-one) and medium priority interrupts are disabled
60 * - C calling context not initialized:
61 * - PS not initialized
62 * - SP not initialized
63 * - the following are initialized:
64 * - LITBASE, cache attributes, WindowBase, WindowStart,
67 * Keep a0 zero. It is used to initialize a few things.
74 movi a0, 0 /* keep this register zero. */
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| /Zephyr-latest/arch/xtensa/include/ |
| D | xtensa_asm2_context.h | 4 * SPDX-License-Identifier: Apache-2.0
10 #include <xtensa/xtensa-types.h>
14 #include <xtensa/config/core-isa.h>
19 * high to low address:
21 * SP-0 <-- Interrupted stack pointer points here
23 * SP-4 Caller A3 spill slot \
24 * SP-8 Caller A2 spill slot |
25 * SP-12 Caller A1 spill slot + (Part of ABI standard)
26 * SP-16 Caller A0 spill slot /
28 * SP-20 Saved A3
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| /Zephyr-latest/soc/intel/intel_adsp/cavs/ |
| D | power.c | 4 * SPDX-License-Identifier: Apache-2.0
22 #include <cavs-idc.h>
57 uint32_t a0; member
89 __asm__ volatile("mov %0, a0" : "=r"(core_desc[core_id].a0)); in _save_core_context()
100 __asm__ volatile("mov a0, %0" :: "r"(core_desc[core_id].a0)); in _restore_core_context()
120 " movi a0, 0\n\t"
125 " wsr a0, WINDOWBASE\n\t"
158 imr_layout->imr_state.header = hdr; in pm_state_set()
161 /* turn off all HPSRAM banks - get a full bitmap */ in pm_state_set()
166 /* do power down - this function won't return */ in pm_state_set()
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| D | multiprocessing.c | 2 * SPDX-License-Identifier: Apache-2.0
5 #include <cavs-idc.h>
22 #define IDC_CORE_MASK(num_cpus) (BIT(num_cpus) - 1)
58 * can only be backwards-referenced. So we hand-assemble a in soc_start_core()
62 * Long term we want to have this in linkable LP-SRAM memory in soc_start_core()
72 0x01, 0xff, 0xff, /* L32R a0, <entry_addr> */ in soc_start_core()
73 0xa0, 0x00, 0x00, /* JX a0 */ in soc_start_core()
85 if (pm_state_next_get(cpu_num)->state == PM_STATE_ACTIVE) { in soc_start_core()
115 /* Send power-up message to the other core. Start address in soc_start_core()
159 * level-sensitive interrupt triggered by a logical OR of each in idc_isr()
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| /Zephyr-latest/tests/boards/nrf/qdec/boards/ |
| D | nrf5340dk_nrf5340_cpuapp.overlay | 3 * SPDX-License-Identifier: Apache-2.0
13 encoder-emulate {
14 compatible = "gpio-leds";
29 psels = <NRF_PSEL(QDEC_A, 0, 4)>, /* Ardiuno A0 */
38 low-power-enable;
45 pinctrl-0 = <&qdec_pinctrl>;
46 pinctrl-1 = <&qdec_sleep_pinctrl>;
47 pinctrl-names = "default", "sleep";
49 led-pre = < 500 >;
50 zephyr,pm-device-runtime-auto;
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| /Zephyr-latest/dts/bindings/gpio/ |
| D | adi,max14916-gpio.yaml | 3 # SPDX-License-Identifier: Apache-2.0
7 compatible: "adi,max14916-gpio"
10 "#gpio-cells":
17 drdy-gpios:
19 High-Side Open-Drain Output. READY is passive low when the internal
22 type: phandle-array
23 fault-gpios:
27 type: phandle-array
28 sync-gpios:
31 type: phandle-array
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| D | adi,max14906-gpio.yaml | 3 # SPDX-License-Identifier: Apache-2.0
7 compatible: "adi,max14906-gpio"
10 "#gpio-cells":
17 drdy-gpios:
19 High-Side Open-Drain Output. READY is passive low when the internal
22 type: phandle-array
23 fault-gpios:
27 type: phandle-array
28 sync-gpios:
31 type: phandle-array
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| /Zephyr-latest/dts/bindings/pinctrl/ |
| D | microchip,mec5-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0
6 Based on pincfg-node.yaml binding.
22 pins, such as the 'bias-pull-up' property in group 2. Here is a list of
25 - bias-disable: Disable pull-up/down (default behavior, not required).
26 - bias-pull-down: Enable pull-down resistor.
27 - bias-pull-up: Enable pull-up resistor.
28 - drive-push-pull: Output driver is push-pull (default, not required).
29 - drive-open-drain: Output driver is open-drain.
30 - output-high: Set output state high when pin configured.
31 - output-low: Set output state low when pin configured.
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| /Zephyr-latest/boards/shields/x_nucleo_idb05a1/doc/ |
| D | index.rst | 1 .. _x-nucleo-idb05a1:
3 X-NUCLEO-IDB05A1: BLE expansion board
8 The X-NUCLEO-IDB05A1 is a Bluetooth Low Energy evaluation board based on the
9 SPBTLE-RF BlueNRG-MS RF module to allow expansion of the STM32 Nucleo boards.
10 The SPBTLE-RF module is FCC (FCC ID: S9NSPBTLERF) and IC certified
11 (IC: 8976C-SPBTLERF).
13 The X-NUCLEO-IDB05A1 is compatible with the ST Morpho and Arduino UNO R3
15 X-NUCLEO-IDB05A1 interfaces with the host microcontroller via the SPI pin, and
23 .. image:: img/x-nucleo-idb05a1.jpg
25 :alt: X-NUCLEO-IDB05A1
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| /Zephyr-latest/soc/intel/intel_adsp/ace/ |
| D | power.c | 4 * SPDX-License-Identifier: Apache-2.0
95 * @brief re-enables IDC interrupt for all cores after exiting D3 state
114 uint32_t a0; member
136 uint8_t rom_bypass_vectors_reserved[0xC00 - 0x14];
150 __asm__ volatile("mov %0, a0" : "=r"(core_desc[core_id].a0)); in _save_core_context()
177 __asm__ volatile("mov a0, %0" :: "r"(core_desc[core_id].a0)); in _restore_core_context()
194 lpsheader->adsp_lpsram_magic = LPSRAM_MAGIC_VALUE; in power_gate_entry()
195 lpsheader->lp_restore_vector = &dsp_restore_vector; in power_gate_entry()
197 /* Re-enabling interrupts for core 0 because someone has to wake-up us in power_gate_entry()
230 " movi a0, 0\n\t"
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| /Zephyr-latest/soc/mediatek/mt8xxx/ |
| D | soc.c | 2 * SPDX-License-Identifier: Apache-2.0
6 #include <zephyr/sys/libc-hooks.h>
50 * 0-5 0-5 1 (L1 is shared w/exceptions, poor choice)
51 * 6-7 7-8 1
52 * 8-10 9-11 2
53 * 11-13 16-18 3
92 struct intc64 polarity; /* 1 == active low */
105 volatile uint32_t *p = bit < 32 ? &g->lo : &g->hi; in set_group_bit()
150 " movi a0, 0x4002f\n\t" /* WOE|EXCM|INTLVL=15 */
151 " wsr a0, PS\n\t"
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| /Zephyr-latest/drivers/ethernet/ |
| D | dsa_ksz8xxx.c | 4 * SPDX-License-Identifier: Apache-2.0
45 #define PRV_DATA(ctx) ((struct ksz8xxx_data *const)(ctx)->prv_data)
66 spi_write_dt(&pdev->spi, &tx); in dsa_ksz8xxx_write_reg()
98 if (!spi_transceive_dt(&pdev->spi, &tx, &rx)) { in dsa_ksz8xxx_read_reg()
139 * Wait for SPI of KSZ8794 being fully operational - up to 10 ms in dsa_ksz8xxx_probe()
142 tmp != KSZ8XXX_CHIP_ID0_ID_DEFAULT && timeout > 0; timeout--) { in dsa_ksz8xxx_probe()
149 return -ENODEV; in dsa_ksz8xxx_probe()
163 return -ENODEV; in dsa_ksz8xxx_probe()
176 * According to KSZ8794 manual - write to static mac address table in dsa_ksz8xxx_write_static_mac_table()
234 * According to KSZ8794 manual - read from static mac address table in dsa_ksz8xxx_read_static_mac_table()
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| /Zephyr-latest/boards/shields/x_nucleo_wb05kn1/doc/ |
| D | index.rst | 1 .. _x-nucleo-wb05kn1:
3 X-NUCLEO-WB05KN1: BLE expansion board
8 The X-NUCLEO-WB05KN1 is a Bluetooth Low Energy evaluation board which allows the
10 The RF module is FCC (FCC ID: YCP-MB203202) and IC certified (IC: 8976A-MB203202).
12 The X-NUCLEO-WB05KN1 is compatible out of the box with the Arduino UNO R3 connector.
15 .. image:: img/x-nucleo-wb05kn1.webp
17 :alt: X-NUCLEO-WB05KN1
20 `X-NUCLEO-WB05KN1 website`_.
25 X-NUCLEO-WB05KN1 can be utilized as a Bluetooth Low-Energy controller shield
26 with a UART or SPI host controller interface (HCI-UART/HCI-SPI).
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| /Zephyr-latest/boards/blues/swan_r5/doc/ |
| D | index.rst | 6 Swan is a low-cost embeddable STM32L4-based microcontroller designed to
7 accelerate the development and deployment of battery-powered solutions.
12 Uniquely for Feather-compatible boards, Swan is designed to satisfy
13 developers' needs that span from early prototyping through high-volume
15 Adafruit's myriad sensors and FeatherWing-compatible carriers.
16 Due to its novel design, for high-volume deployment the low-cost Swan
20 The board has three independent power options---USB, Battery, or Line
21 power---and provides a software-switchable 2 Amp regulator for powering external
22 sensors. When operating in its low-power operating mode, the entire Swan
24 making it quite suitable for battery-powered devices.
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| /Zephyr-latest/doc/hardware/porting/ |
| D | shields.rst | 6 Shields, also known as "add-on" or "daughter boards", attach to a board
8 In Zephyr, the shield feature provides Zephyr-formatted shield
17 .. code-block:: none
27 format that is merged with the board's :ref:`devicetree <dt-guide>`
44 .. code-block:: devicetree
72 Hardware shield-to-board compatibility depends on the use of well-known
81 * Devicetree: A board :ref:`devicetree <dt-guide>` file,
85 .. code-block:: devicetree
90 -----------------------------------
96 .. code-block:: none
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| /Zephyr-latest/boards/u-blox/ubx_bmd345eval/ |
| D | ubx_bmd345eval_nrf52840.dts | 2 * BMD-340-EVAL board configuration
3 * Copyright (c) 2021 u-blox AG
6 * SPDX-License-Identifier: Apache-2.0
9 /dts-v1/;
12 #include "ubx_bmd345eval_nrf52840-pinctrl.dtsi"
13 #include <zephyr/dt-bindings/input/input-event-codes.h>
16 model = "u-blox BMD-345-EVAL EVK nRF52840";
17 compatible = "u-blox,ubx-bmd345eval-nrf52840";
21 zephyr,shell-uart = &uart0;
22 zephyr,uart-mcumgr = &uart0;
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| /Zephyr-latest/boards/st/nucleo_wl55jc/doc/ |
| D | nucleo_wl55jc.rst | 6 The NUCLEO-WL55JC STM32WL Nucleo-64 board provides an affordable and flexible
11 - STM32WL55JC microcontroller multiprotocol LPWAN dual-core 32-bit
12 (Arm® Cortex®-M4/M0+ at 48 MHz) in UFBGA73 package featuring:
14 - Ultra-low-power MCU
15 - RF transceiver (150 MHz to 960 MHz frequency range) supporting LoRa®,
17 - 256-Kbyte Flash memory and 64-Kbyte SRAM
19 - 3 user LEDs
20 - 3 user buttons and 1 reset push-button
21 - 32.768 kHz LSE crystal oscillator
22 - 32 MHz HSE on-board oscillator
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| /Zephyr-latest/boards/nordic/nrf5340_audio_dk/ |
| D | nrf5340_audio_dk_nrf5340_cpuapp_common.dtsi | 2 * Copyright (c) 2020-2022 Nordic Semiconductor ASA
4 * SPDX-License-Identifier: Apache-2.0
6 #include "nrf5340_audio_dk_nrf5340_cpuapp_common-pinctrl.dtsi"
7 #include <zephyr/dt-bindings/sensor/ina230.h>
12 zephyr,shell-uart = &uart0;
13 zephyr,uart-mcumgr = &uart0;
14 zephyr,bt-mon-uart = &uart0;
15 zephyr,bt-c2h-uart = &uart0;
16 zephyr,bt-hci = &bt_hci_ipc0;
20 gpio_fwd: nrf-gpio-forwarder {
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| /Zephyr-latest/arch/riscv/ |
| D | Kconfig | 1 # Copyright (c) 2016 Jean-Paul Etienne <fractalclone@gmail.com>
3 # SPDX-License-Identifier: Apache-2.0
13 bool "Hard-float calling convention"
17 This option enables the hard-float calling convention.
24 bool "RISC-V global pointer relative addressing"
31 Note: To support this feature, RISC-V SoC needs to initialize
51 This is for RISC-V implementations that require every mret to be
52 balanced with an ecall. This is not required by the RISC-V spec
57 prompt "RISC-V SMP IPI implementation"
63 bool "CLINT-based IPI"
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| /Zephyr-latest/boards/u-blox/ubx_bmd345eval/doc/ |
| D | index.rst | 3 u-blox EVK-BMD-34/38: BMD-345-EVAL
9 The BMD-345-EVALhardware provides support for the u-blox BMD-345
11 ARM Cortex-M4F CPU and Skyworks RFX2411 Front End Module (FEM),
12 also known as a Power Amplifier / Low Noise Amplifier (PA/LNA).
19 * :abbr:`I2C (Inter-Integrated Circuit)`
23 * RADIO (Bluetooth Low Energy and 802.15.4)
27 * :abbr:`UART (Universal asynchronous receiver-transmitter)`
31 .. figure:: img/bmd-345-eval_features.jpg
35 BMD-345-EVAL (Credit: ublox AG)
37 More information about the BMD-345-EVAL and BMD-345 module can be
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| /Zephyr-latest/boards/nxp/rd_rw612_bga/ |
| D | rd_rw612_bga.dtsi | 2 * Copyright 2022-2024 NXP
4 * SPDX-License-Identifier: Apache-2.0
8 #include "rd_rw612_bga-pinctrl.dtsi"
9 #include <zephyr/dt-bindings/input/input-event-codes.h>
16 usart-0 = &flexcomm3;
18 i2c-0 = &flexcomm2;
20 dmic-dev = &dmic0;
21 mcuboot-button0 = &sw_4;
22 pwm-0 = &sctimer;
28 zephyr,code-partition = &slot0_partition;
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| /Zephyr-latest/doc/connectivity/bluetooth/shell/host/ |
| D | gap.rst | 15 :kconfig:option:`CONFIG_BT_ID_MAX`. To create a new identity, use :code:`bt id-create` command. You
16 can then use it by selecting it with its ID :code:`bt id-select <id>`. Finally, you can list all the
17 available identities with :code:`id-show`.
28 .. code-block:: console
32 …[DEVICE]: CB:01:1A:2D:6E:AE (random), AD evt type 0, RSSI -78 C:1 S:1 D:0 SR:0 E:0 Prim: LE 1M, S…
33 …[DEVICE]: 20:C2:EE:59:85:5B (random), AD evt type 3, RSSI -62 C:0 S:0 D:0 SR:0 E:0 Prim: LE 1M, S…
34 …[DEVICE]: E3:72:76:87:2F:E8 (random), AD evt type 3, RSSI -74 C:0 S:0 D:0 SR:0 E:0 Prim: LE 1M, S…
35 …[DEVICE]: 1E:19:25:8A:CB:84 (random), AD evt type 3, RSSI -67 C:0 S:0 D:0 SR:0 E:0 Prim: LE 1M, S…
36 …[DEVICE]: 26:42:F3:D5:A0:86 (random), AD evt type 3, RSSI -73 C:0 S:0 D:0 SR:0 E:0 Prim: LE 1M, S…
37 …[DEVICE]: 0C:61:D1:B9:5D:9E (random), AD evt type 3, RSSI -87 C:0 S:0 D:0 SR:0 E:0 Prim: LE 1M, S…
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| /Zephyr-latest/boards/shields/link_board_eth/doc/ |
| D | index.rst | 23 - ENC424J600
25 - 10/100 Base-T/TX Ethernet Controller with SPI Interface
26 - Factory Pre-programmed Unique MAC Address
28 - Connectivity
30 - Arduino compatible
31 - RJ45 Connector
33 - Electrical Characteristics
35 - Supply Voltage 3.3 V
36 - Supply Current 75 mA ... 147 mA
45 +-----------------------+-----------------------+-----------------------------+
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