1/*
2 * Copyright 2022-2024 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <nxp/nxp_rw6xx.dtsi>
8#include "rd_rw612_bga-pinctrl.dtsi"
9#include <zephyr/dt-bindings/input/input-event-codes.h>
10
11/ {
12	model = "nxp,rd_rw612_bga";
13	compatible = "nxp,rd_rw612_bga";
14
15	aliases {
16		usart-0 = &flexcomm3;
17		sw0 = &sw_4;
18		i2c-0 = &flexcomm2;
19		watchdog0 = &wwdt;
20		dmic-dev = &dmic0;
21		mcuboot-button0 = &sw_4;
22		pwm-0 = &sctimer;
23	};
24
25	chosen {
26		zephyr,sram = &sram_data;
27		zephyr,flash = &mx25u51245g;
28		zephyr,code-partition = &slot0_partition;
29		zephyr,uart-mcumgr = &flexcomm3;
30		zephyr,flash-controller = &mx25u51245g;
31		zephyr,console = &flexcomm3;
32		zephyr,shell-uart = &flexcomm3;
33	};
34
35	gpio_keys {
36		compatible = "gpio-keys";
37		sw_4: sw_4 {
38			label = "User SW4";
39			gpios = <&hsgpio0 25 0>;
40			zephyr,code = <INPUT_KEY_0>;
41		};
42	};
43
44	arduino_header: arduino-connector {
45		compatible = "arduino-header-r3";
46		#gpio-cells = <2>;
47		gpio-map-mask = <0xffffffff 0xffffffc0>;
48		gpio-map-pass-thru = <0 0x3f>;
49		gpio-map =	<0 0 &hsgpio1 14 0>,	/* A0 */
50				<1 0 &hsgpio1 15 0>,	/* A1 */
51				<2 0 &hsgpio1 16 0>,	/* A2 */
52				<3 0 &hsgpio1 17 0>,	/* A3 */
53				<4 0 &hsgpio0 16 0>,	/* A4 */
54				<5 0 &hsgpio0 17 0>,	/* A5 */
55				<6 0 &hsgpio0 24 0>,	/* D0 */
56				<7 0 &hsgpio0 26 0>,	/* D1 */
57				<8 0 &hsgpio0 11 0>,	/* D2 */
58				<9 0 &hsgpio0 15 0>,	/* D3 */
59				<10 0 &hsgpio0 18 0>,	/* D4 */
60				<11 0 &hsgpio0 27 0>,	/* D5 */
61				<12 0 &hsgpio0 6 0>,	/* D6 */
62				<13 0 &hsgpio0 10 0>,	/* D7 */
63				<14 0 &hsgpio1 18 0>,	/* D8 */
64				<15 0 &hsgpio1 13 0>,	/* D9 */
65				<16 0 &hsgpio0 0 0>,	/* D10 */
66				<17 0 &hsgpio0 2 0>,	/* D11 */
67				<18 0 &hsgpio0 3 0>,	/* D12 */
68				<19 0 &hsgpio0 4 0>,	/* D13 */
69				<20 0 &hsgpio0 16 0>,	/* D14 */
70				<21 0 &hsgpio0 17 0>;	/* D15 */
71	};
72
73
74	/*
75	 * The pins for this interface are chosen arbitrarily- the RD-RW612
76	 * board does not have the NXP 8080 interface, but can support displays
77	 * using it by connecting signals directly with jumper wires.
78	 */
79	nxp_lcd_8080_connector: lcd-8080-connector {
80		compatible = "nxp,lcd-8080";
81		#gpio-cells = <2>;
82		gpio-map-mask = <0xffffffff 0xffffffc0>;
83		gpio-map-pass-thru = <0 0x3f>;
84		gpio-map =	<9  0 &hsgpio0 3 0>,	/* Pin 9, LCD touch INT */
85				<10  0 &hsgpio0 2 0>,	/* Pin 10, LCD backlight control */
86				<11  0 &hsgpio0 4 0>;	/* Pin 11, LCD and touch reset */
87	};
88};
89
90&wwdt {
91	status = "okay";
92};
93
94arduino_spi: &flexcomm0 {
95	compatible = "nxp,lpc-spi";
96	pinctrl-0 = <&pinmux_flexcomm0_spi>;
97	pinctrl-names = "default";
98	status = "okay";
99	#address-cells = <1>;
100	#size-cells = <0>;
101};
102
103arduino_i2c: &flexcomm2 {
104	compatible = "nxp,lpc-i2c";
105	status = "okay";
106	clock-frequency = <I2C_BITRATE_FAST>;
107	#address-cells = <1>;
108	#size-cells = <0>;
109	pinctrl-0 = <&pinmux_flexcomm2_i2c>;
110	pinctrl-names = "default";
111};
112
113&flexcomm3 {
114	compatible = "nxp,lpc-usart";
115	status = "okay";
116	current-speed = <115200>;
117	pinctrl-0 = <&pinmux_flexcomm3_usart>;
118	pinctrl-names = "default";
119};
120
121&hsgpio0 {
122	status = "okay";
123};
124
125&flexspi {
126	status = "okay";
127	ahb-bufferable;
128	ahb-prefetch;
129	ahb-cacheable;
130	ahb-read-addr-opt;
131	rx-clock-source = <1>;
132	rx-clock-source-b = <3>;
133	pinctrl-0 = <&pinmux_flexspi>;
134	pinctrl-names = "default";
135	status = "okay";
136	mx25u51245g: mx25u51245g@0 {
137		compatible = "nxp,imx-flexspi-nor";
138		spi-max-frequency = <133000000>;
139		reg = <0>;
140		/* MX25UM51245G is 64MB, 512MBit flash part */
141		size = <DT_SIZE_M(64 * 8)>;
142		status = "okay";
143		jedec-id = [c2 25 3a];
144		erase-block-size = <4096>;
145		write-block-size = <1>;
146
147		partitions {
148			compatible = "fixed-partitions";
149			#address-cells = <1>;
150			#size-cells = <1>;
151
152			boot_partition: partition@0 {
153				label = "mcuboot";
154				reg = <0x00000000 DT_SIZE_K(128)>;
155			};
156			/* The MCUBoot swap-move algorithm uses the last 2 sectors
157			 * of the primary slot0 for swap status and move.
158			 */
159			slot0_partition: partition@20000 {
160				label = "image-0";
161				reg = <0x00020000 (DT_SIZE_M(3) + DT_SIZE_K(2 * 4))>;
162			};
163			slot1_partition: partition@323000 {
164				label = "image-1";
165				reg = <0x00323000 DT_SIZE_M(3)>;
166			};
167			storage_partition: partition@623000 {
168				label = "storage";
169				reg = <0x00623000 (DT_SIZE_M(58) - DT_SIZE_K(136))>;
170			};
171		};
172	};
173	is66wvq8m4: is66wvq8m4@2 {
174		compatible = "nxp,imx-flexspi-is66wvq8m4";
175		/* IS66WVQ8M4 is 4MB, 32MBit pSRAM */
176		size = <DT_SIZE_M(32)>;
177		reg = <2>;
178		spi-max-frequency = <256000000>;
179		/* PSRAM cannot be enabled while board is in default XIP
180		 * configuration, as it will conflict with flash chip.
181		 */
182		status = "disabled";
183		cs-interval-unit = <1>;
184		cs-interval = <5>;
185		cs-hold-time = <2>;
186		cs-setup-time = <3>;
187		data-valid-time = <1>;
188		column-space = <14>;
189		ahb-write-wait-unit = <2>;
190		ahb-write-wait-interval = <0>;
191	};
192};
193
194&dmic0 {
195	pinctrl-0 = <&pinmux_dmic0>;
196	pinctrl-names = "default";
197	use2fs;
198	status = "okay";
199};
200
201/* Configure pdm channels 0-3 with gain, and cutoff settings
202 * appropriate for the attached MEMS microphones.
203 * Note that PDMC0/PDMC1 and PDMC2/PDMC3 are each connected to the same
204 * microphone. For best results, read from PDM HW channel 0 as left channel,
205 * and PDM HW channel 1 as right channel.
206 */
207&pdmc0 {
208	status = "okay";
209	gainshift = <3>;
210	dc-cutoff = "155hz";
211	dc-gain = <1>;
212};
213
214&pdmc1 {
215	status = "okay";
216	gainshift = <3>;
217	dc-cutoff = "155hz";
218	dc-gain = <1>;
219};
220
221&pdmc2 {
222	status = "okay";
223	gainshift = <3>;
224	dc-cutoff = "155hz";
225	dc-gain = <1>;
226};
227
228&pdmc3 {
229	status = "okay";
230	gainshift = <3>;
231	dc-cutoff = "155hz";
232	dc-gain = <1>;
233};
234
235zephyr_udc0: &usb_otg {
236	status = "okay";
237};
238
239&dma0 {
240	status = "okay";
241};
242
243zephyr_mipi_dbi_parallel: &lcdic {
244	status = "okay";
245	pinctrl-0 = <&pinmux_lcdic>;
246	pinctrl-names = "default";
247};
248
249/*
250 * Similar to the flexio connection, these pins are not
251 * broken out in the format required to connect directly to
252 * an NXP 8080 display, but they can be connected with jumper
253 * wires.
254 */
255nxp_8080_touch_panel_i2c: &arduino_i2c {
256	status = "okay";
257};
258
259&mrt0_channel0 {
260	status = "okay";
261};
262
263&ctimer0 {
264	status = "okay";
265};
266
267&sctimer {
268	status = "okay";
269	pinctrl-0 = <&pinmux_pwm0>;
270	pinctrl-names = "default";
271};
272
273&pmu {
274	reset-causes-en = <PMU_RESET_CM33_LOCKUP>,
275			  <PMU_RESET_ITRC>,
276			  <PMU_RESET_AP_RESET>;
277};
278
279&adc0 {
280	status = "okay";
281};
282
283&dac0 {
284	status = "okay";
285};
286
287/* OS Timer is the wakeup source for PM mode 2 */
288&os_timer {
289	status = "okay";
290	wakeup-source;
291};
292
293&systick {
294	status = "disabled";
295};
296
297&pin1 {
298	status = "okay";
299	wakeup-level = "low";
300};
301
302&nbu {
303	status = "okay";
304	wakeup-source;
305};
306