/Zephyr-latest/subsys/bluetooth/mesh/ |
D | foundation.h | 7 #define OP_APP_KEY_ADD BT_MESH_MODEL_OP_1(0x00) 8 #define OP_APP_KEY_UPDATE BT_MESH_MODEL_OP_1(0x01) 9 #define OP_DEV_COMP_DATA_STATUS BT_MESH_MODEL_OP_1(0x02) 10 #define OP_MOD_PUB_SET BT_MESH_MODEL_OP_1(0x03) 11 #define OP_HEALTH_CURRENT_STATUS BT_MESH_MODEL_OP_1(0x04) 12 #define OP_HEALTH_FAULT_STATUS BT_MESH_MODEL_OP_1(0x05) 13 #define OP_HEARTBEAT_PUB_STATUS BT_MESH_MODEL_OP_1(0x06) 14 #define OP_APP_KEY_DEL BT_MESH_MODEL_OP_2(0x80, 0x00) 15 #define OP_APP_KEY_GET BT_MESH_MODEL_OP_2(0x80, 0x01) 16 #define OP_APP_KEY_LIST BT_MESH_MODEL_OP_2(0x80, 0x02) [all …]
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D | rpr.h | 7 #define RPR_OP_EXTENDED_SCAN_REPORT BT_MESH_MODEL_OP_2(0x80, 0x57) 8 #define RPR_OP_EXTENDED_SCAN_START BT_MESH_MODEL_OP_2(0x80, 0x56) 9 #define RPR_OP_LINK_CLOSE BT_MESH_MODEL_OP_2(0x80, 0x5A) 10 #define RPR_OP_LINK_GET BT_MESH_MODEL_OP_2(0x80, 0x58) 11 #define RPR_OP_LINK_OPEN BT_MESH_MODEL_OP_2(0x80, 0x59) 12 #define RPR_OP_LINK_REPORT BT_MESH_MODEL_OP_2(0x80, 0x5C) 13 #define RPR_OP_LINK_STATUS BT_MESH_MODEL_OP_2(0x80, 0x5B) 14 #define RPR_OP_PDU_OUTBOUND_REPORT BT_MESH_MODEL_OP_2(0x80, 0x5E) 15 #define RPR_OP_PDU_REPORT BT_MESH_MODEL_OP_2(0x80, 0x5F) 16 #define RPR_OP_PDU_SEND BT_MESH_MODEL_OP_2(0x80, 0x5D) [all …]
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/Zephyr-latest/drivers/sensor/bosch/bmi08x/ |
D | bmi08x_config_file.h | 13 0xc8, 0x2e, 0x00, 0x2e, 0x80, 0x2e, 0x48, 0xb4, 0xc8, 0x2e, 0x00, 0x2e, 0x80, 0x2e, 0x6d, 14 0xb4, 0xc8, 0x2e, 0x00, 0x2e, 0x80, 0x2e, 0xd4, 0xb3, 0x80, 0x2e, 0xb0, 0xb3, 0x80, 0x2e, 15 0x12, 0xb4, 0x50, 0x39, 0x21, 0x2e, 0xb0, 0xf0, 0x10, 0x30, 0x21, 0x2e, 0x16, 0xf0, 0x80, 16 0x2e, 0xfe, 0xb4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 17 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x45, 18 0x79, 0x80, 0x2e, 0x18, 0x00, 0x80, 0x2e, 0x18, 0x00, 0x80, 0x2e, 0x18, 0x00, 0x80, 0x2e, 19 0x18, 0x00, 0x80, 0x2e, 0x18, 0x00, 0x80, 0x2e, 0x18, 0x00, 0x80, 0x2e, 0x18, 0x00, 0x80, 20 0x2e, 0x18, 0x00, 0x80, 0x2e, 0x18, 0x00, 0x80, 0x2e, 0x18, 0x00, 0x80, 0x2e, 0x18, 0x00, 21 0x80, 0x2e, 0x18, 0x00, 0x80, 0x2e, 0x18, 0x00, 0x80, 0x2e, 0x18, 0x00, 0x80, 0x2e, 0x18, 22 0x00, 0x80, 0x2e, 0x18, 0x00, 0x80, 0x2e, 0x18, 0x00, 0x80, 0x2e, 0x18, 0x00, 0x80, 0x2e, [all …]
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/Zephyr-latest/samples/modules/tflite-micro/tflm_ethosu/src/models/keyword_spotting_cnn_small_int8/ |
D | output.h | 8 0x80, 0x23, 0x80, 0x80, 0x80, 0x80, 0x80, 0x83, 0x80, 0x80, 0x81, 0xd9 };
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/Zephyr-latest/tests/subsys/display/cfb/basic/src/ |
D | cfb_font_rectspace1016.c | 13 0xFF, 0xFF, 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, 14 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, 0xFF, 0xFF,
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D | cfb_font_rectspace1016_msb.c | 13 0xFF, 0xFF, 0x80, 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, 0x01, 14 0x80, 0x01, 0x80, 0x01, 0x80, 0x01, 0x80, 0x01, 0xFF, 0xFF,
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/Zephyr-latest/tests/lib/cmsis_dsp/filtering/src/ |
D | misc_q7.pat | 2 0xF3, 0xAE, 0x42, 0x21, 0x19, 0xE2, 0x32, 0x15, 3 0xF9, 0xC4, 0xB6, 0xE3, 0xE1, 0x49, 0x2F, 0x1A, 4 0xF9, 0xE0, 0x28, 0xEA, 0xF1, 0x41, 0x7F, 0x32, 5 0xD5, 0x04, 0xBF, 0x0B, 0xD0, 0xBC, 0x16, 0x20, 6 0xBD, 0x08, 0xD8, 0xF4, 0x2E, 0x13, 0xFB, 0xC4, 7 0x26, 0xF2, 0x05, 0x0E, 0xA9, 0x09, 0xDE, 0x42, 8 0x30, 0xFC, 0x16, 0xDB, 0x17, 0xD8, 0x02, 0x2C, 9 0xFD, 0x05, 0xEF, 0x02, 0x13, 0xDA, 0x03, 0x2D, 10 0x24, 0x0D, 0x0D, 0xE8, 0xF4, 0xB5, 0xF6, 0xB6, 11 0x1C, 0xDE, 0x09, 0x03, 0xF0, 0xCD, 0x0B, 0xB0, [all …]
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/Zephyr-latest/boards/openisa/rv32m1_vega/support/ |
D | openocd_rv32m1_vega_ri5cy.cfg | 4 set _WORKAREASIZE 0x2000 11 set _WORKAREASIZE 0x1000 18 set _CPUTAPID 0x249511C3 38 # Select core 0 39 core_select 0 41 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 46 flash bank $_CHIPNAME.flash0 rv32m1 0 0 0 0 $_TARGETNAME # For core 0 47 flash bank $_CHIPNAME.flash1 rv32m1 0x01000000 0 0 0 $_TARGETNAME # For core 1 52 mwb 0x40023000 0x70 53 mww 0x40023004 0x49000000 [all …]
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D | openocd_rv32m1_vega_zero_riscy.cfg | 4 set _WORKAREASIZE 0x2000 11 set _WORKAREASIZE 0x1000 18 set _CPUTAPID 0x249511C3 41 $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 46 flash bank $_CHIPNAME.flash0 rv32m1 0 0 0 0 $_TARGETNAME # For core 0 47 flash bank $_CHIPNAME.flash1 rv32m1 0x01000000 0 0 0 $_TARGETNAME # For core 1 52 mwb 0x40023000 0x70 53 mww 0x40023004 0x49000000 54 mwb 0x40023000 0x80 58 mwb 0x40023000 0x70 [all …]
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/Zephyr-latest/boards/madmachine/mm_feather/ |
D | mmfeather_sdram_ini_dcd.c | 20 0xD2, 22 0x04, 0x30, 24 0x41, 26 0xCC, 0x03, 0xAC, 0x04, 28 0x40, 0x0F, 0xC0, 0x68, 0xFF, 0xFF, 0xFF, 0xFF, 30 0x40, 0x0F, 0xC0, 0x6C, 0xFF, 0xFF, 0xFF, 0xFF, 32 0x40, 0x0F, 0xC0, 0x70, 0xFF, 0xFF, 0xFF, 0xFF, 34 0x40, 0x0F, 0xC0, 0x74, 0xFF, 0xFF, 0xFF, 0xFF, 36 0x40, 0x0F, 0xC0, 0x78, 0xFF, 0xFF, 0xFF, 0xFF, 38 0x40, 0x0F, 0xC0, 0x7C, 0xFF, 0xFF, 0xFF, 0xFF, [all …]
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/Zephyr-latest/boards/madmachine/mm_swiftio/ |
D | mmswiftio_sdram_ini_dcd.c | 20 0xD2, 22 0x04, 0x30, 24 0x41, 26 0xCC, 0x03, 0xAC, 0x04, 28 0x40, 0x0F, 0xC0, 0x68, 0xFF, 0xFF, 0xFF, 0xFF, 30 0x40, 0x0F, 0xC0, 0x6C, 0xFF, 0xFF, 0xFF, 0xFF, 32 0x40, 0x0F, 0xC0, 0x70, 0xFF, 0xFF, 0xFF, 0xFF, 34 0x40, 0x0F, 0xC0, 0x74, 0xFF, 0xFF, 0xFF, 0xFF, 36 0x40, 0x0F, 0xC0, 0x78, 0xFF, 0xFF, 0xFF, 0xFF, 38 0x40, 0x0F, 0xC0, 0x7C, 0xFF, 0xFF, 0xFF, 0xFF, [all …]
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/Zephyr-latest/dts/arm/infineon/cat1b/cyw20829/ |
D | cyw20829.dtsi | 13 #size-cells = <0>; 15 cpu@0 { 18 reg = <0>; 39 reg = <0x20000000 DT_SIZE_K(244)>; 45 reg = <0x2003D000 DT_SIZE_K(12)>; 51 reg = <0x40400000 0x20000>; 56 reg = <0x40400000 0x4000>; 63 reg = <0x40410000 0x80>; 64 interrupts = <0 4>; 72 reg = <0x40410080 0x80>; [all …]
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/Zephyr-latest/subsys/fb/ |
D | cfb_fonts.c | 20 0x00, 0x00, 21 0x00, 0x00, 22 0x00, 0x00, 23 0x00, 0x00, 24 0x00, 0x00, 25 0x00, 0x00, 26 0x00, 0x00, 27 0x00, 0x00, 28 0x00, 0x00, 29 0x00, 0x00, [all …]
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/Zephyr-latest/drivers/sensor/bosch/bmi270/ |
D | bmi270_config_file.h | 12 0xc8, 0x2e, 0x00, 0x2e, 0x80, 0x2e, 0x1a, 0x00, 0xc8, 0x2e, 0x00, 13 0x2e, 0xc8, 0x2e, 0x00, 0x2e, 0xc8, 0x2e, 0x00, 0x2e, 0xc8, 0x2e, 14 0x00, 0x2e, 0xc8, 0x2e, 0x00, 0x2e, 0xc8, 0x2e, 0x00, 0x2e, 0x90, 15 0x32, 0x21, 0x2e, 0x59, 0xf5, 0x10, 0x30, 0x21, 0x2e, 0x6a, 0xf5, 16 0x1a, 0x24, 0x22, 0x00, 0x80, 0x2e, 0x3b, 0x00, 0xc8, 0x2e, 0x44, 17 0x47, 0x22, 0x00, 0x37, 0x00, 0xa4, 0x00, 0xff, 0x0f, 0xd1, 0x00, 18 0x07, 0xad, 0x80, 0x2e, 0x00, 0xc1, 0x80, 0x2e, 0x00, 0xc1, 0x80, 19 0x2e, 0x00, 0xc1, 0x80, 0x2e, 0x00, 0xc1, 0x80, 0x2e, 0x00, 0xc1, 20 0x80, 0x2e, 0x00, 0xc1, 0x80, 0x2e, 0x00, 0xc1, 0x80, 0x2e, 0x00, 21 0xc1, 0x80, 0x2e, 0x00, 0xc1, 0x80, 0x2e, 0x00, 0xc1, 0x80, 0x2e, [all …]
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/Zephyr-latest/tests/subsys/dsp/basicmath/src/ |
D | q7.pat | 2 0x52, 0x01, 0x47, 0x20, 0xA5, 0xFD, 0xFC, 0x44, 3 0xF5, 0xCB, 0x2A, 0xE7, 0x1E, 0x28, 0xFF, 0xEF, 4 0x3E, 0x2C, 0x05, 0x32, 0xAE, 0x09, 0xBE, 0xF5, 5 0x24, 0xFA, 0xDE, 0xD6, 0xF4, 0xE7, 0x0D, 0xD7, 6 0x10, 0x19, 0x0C, 0xC8, 0xBB, 0x1E, 0x05, 0xAA, 7 0x44, 0x60, 0x2D, 0x21, 0x1C, 0xF0, 0x2E, 0x25, 8 0xF4, 0xF1, 0xC7, 0x19, 0x26, 0xBB, 0xD0, 0x08, 9 0x46, 0xF9, 0xEF, 0x7E, 0x19, 0x1E, 0x1B, 0x0A, 10 0x1F, 0x22, 0x12, 0x10, 0x13, 0x05, 0x41, 0x0F, 11 0x3B, 0xF6, 0xF9, 0x45, 0xE5, 0xE4, 0x14, 0xCD, [all …]
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/Zephyr-latest/dts/arm/infineon/cat1a/psoc6_04/ |
D | psoc6_04.dtsi | 13 #size-cells = <0>; 15 cpu@0 { 18 reg = <0>; 29 reg = < 0x40240000 0x10000 >; 35 reg = <0x10000000 0x40000>; 41 reg = <0x14000000 0x0>; 49 reg = <0x8000000 0x20000>; 55 reg = <0x40300000 0x20000>; 57 #size-cells = <0>; 61 reg = <0x40300000 0x4000>; [all …]
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/Zephyr-latest/dts/arm/infineon/cat1a/psoc6_03/ |
D | psoc6_03.dtsi | 13 #size-cells = <0>; 15 cpu@0 { 18 reg = <0>; 29 reg = < 0x40240000 0x10000 >; 35 reg = <0x10000000 0x80000>; 41 reg = <0x14000000 0x8000>; 49 reg = <0x8000000 0x40000>; 55 reg = <0x40300000 0x20000>; 57 #size-cells = <0>; 61 reg = <0x40300000 0x4000>; [all …]
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/Zephyr-latest/include/zephyr/arch/x86/ia32/ |
D | syscall.h | 19 #define USER_CODE_SEG 0x2b /* at dpl=3 */ 20 #define USER_DATA_SEG 0x33 /* at dpl=3 */ 48 "int $0x80\n\t" in arch_syscall_invoke6() 66 __asm__ volatile("int $0x80" in arch_syscall_invoke5() 81 __asm__ volatile("int $0x80" in arch_syscall_invoke4() 96 __asm__ volatile("int $0x80" in arch_syscall_invoke3() 109 __asm__ volatile("int $0x80" in arch_syscall_invoke2() 123 __asm__ volatile("int $0x80" in arch_syscall_invoke1() 136 __asm__ volatile("int $0x80" in arch_syscall_invoke0()
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/Zephyr-latest/dts/arm/infineon/cat1a/legacy/ |
D | psoc6.dtsi | 16 #size-cells = <0>; 18 cpu@0 { 21 reg = <0>; 32 reg = <0x40250000 0x10000>; 40 reg = <0x10000000 DT_SIZE_K(384)>; 46 reg = <0x10060000 DT_SIZE_K(640)>; 53 reg = <0x08000000 DT_SIZE_K(140)>; 58 reg = <0x08023000 DT_SIZE_K(4)>; 64 reg = <0x08024000 DT_SIZE_K(112)>; 73 ranges = <0x40310000 0x40310000 0x2024>; [all …]
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/Zephyr-latest/dts/arm/microchip/mec5/ |
D | mec5_power_guards.dtsi | 11 reg = <0x40003000 0x80>; 17 reg = <0x40003080 0x80>;
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D | mec5_gpspi_v1.dtsi | 11 reg = <0x40009400 0x80>; 16 reg = <0x40009480 0x80>;
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D | mec5_gpspi_v2.dtsi | 12 reg = <0x40009400 0x80>; 18 reg = <0x40009480 0x80>;
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/Zephyr-latest/dts/arm/atmel/ |
D | samr21.dtsi | 17 ranges = <0x41004400 0x41004400 0x180>; 21 reg = <0x41004500 0x80>; 32 reg = <0x41004500 0x80>;
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D | samc2x.dtsi | 16 adc-0 = &adc0; 22 sercom-0 = &sercom0; 27 tcc-0 = &tcc0; 40 #size-cells = <0>; 42 cpu0: cpu@0 { 44 reg = <0>; 56 reg = <0x0080A00C 0x4>, 57 <0x0080A040 0x4>, 58 <0x0080A044 0x4>, 59 <0x0080A048 0x4>; [all …]
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/Zephyr-latest/dts/arm/infineon/cat1a/psoc6_01/ |
D | psoc6_01.dtsi | 13 #size-cells = <0>; 15 cpu@0 { 18 reg = <0>; 29 reg = < 0x40250000 0x10000 >; 35 reg = <0x10000000 0x100000>; 41 reg = <0x14000000 0x8000>; 49 reg = <0x8000000 0x48000>; 55 reg = <0x40310000 0x20000>; 57 #size-cells = <0>; 62 reg = <0x40310000 0x4000>; [all …]
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