Lines Matching +full:0 +full:x80
13 #size-cells = <0>;
15 cpu@0 {
18 reg = <0>;
29 reg = < 0x40240000 0x10000 >;
35 reg = <0x10000000 0x80000>;
41 reg = <0x14000000 0x8000>;
49 reg = <0x8000000 0x40000>;
55 reg = <0x40300000 0x20000>;
57 #size-cells = <0>;
61 reg = <0x40300000 0x4000>;
68 reg = <0x40310000 0x80>;
69 interrupts = <0 6>;
77 reg = <0x40310100 0x80>;
86 reg = <0x40310180 0x80>;
95 reg = <0x40310280 0x80>;
104 reg = <0x40310300 0x80>;
113 reg = <0x40310380 0x80>;
122 reg = <0x40310400 0x80>;
131 reg = <0x40310480 0x80>;
140 reg = <0x40310500 0x80>;
149 reg = <0x40310580 0x80>;
158 reg = <0x40310600 0x80>;
167 reg = <0x40310700 0x80>;
177 reg = <0x16000600 0xb>;
183 reg = <0x409d0000 0x10000>;
190 reg = <0x40600000 0x10000>;
192 #size-cells = <0>;
198 reg = <0x40610000 0x10000>;
200 #size-cells = <0>;
206 reg = <0x40620000 0x10000>;
208 #size-cells = <0>;
214 reg = <0x40630000 0x10000>;
216 #size-cells = <0>;
222 reg = <0x40640000 0x10000>;
224 #size-cells = <0>;
230 reg = <0x40650000 0x10000>;
232 #size-cells = <0>;
238 reg = <0x40660000 0x10000>;
240 #size-cells = <0>;
246 reg = <0x40460000 0x2000>;