Searched +full:- +full:bootloader (Results 1 – 25 of 502) sorted by relevance
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/Zephyr-latest/subsys/retention/ |
D | Kconfig.blinfo | 2 # SPDX-License-Identifier: Apache-2.0 5 bool "Bootloader info" 7 Adds a bootloader information sharing system which allows for 8 retreiving data from the bootloader when data sharing is enabled. 13 DT_CHOSEN_BOOTLOADER_INFO := zephyr,bootloader-info 21 Adds a bootloader information sharing system for MCUboot and 28 the "zephyr,bootloader-info" chosen node via device tree, MCUboot 29 must be built with the same "zephyr,bootloader-info" DTS node and 35 int "Bootloader info init priority" 38 Bootloader info initialization priority (must be higher than init [all …]
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/Zephyr-latest/soc/ti/simplelink/cc13x2x7_cc26x2x7/ |
D | Kconfig | 3 # SPDX-License-Identifier: Apache-2.0 35 bool "ROM bootloader" 37 Enable the serial bootloader which resides in ROM on CC13xx / CC26xx 41 bool "ROM bootloader backdoor" 44 Enable the ROM bootloader backdoor which starts the bootloader if the 48 int "ROM bootloader backdoor pin" 53 Set the pin that is level checked if the bootloader backdoor is 57 int "ROM bootloader backdoor level" 62 Set the active level of the pin selected for the bootloader backdoor.
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/Zephyr-latest/soc/ti/simplelink/cc13x2_cc26x2/ |
D | Kconfig | 3 # SPDX-License-Identifier: Apache-2.0 34 bool "ROM bootloader" 36 Enable the serial bootloader which resides in ROM on CC13xx / CC26xx 40 bool "ROM bootloader backdoor" 43 Enable the ROM bootloader backdoor which starts the bootloader if the 47 int "ROM bootloader backdoor pin" 52 Set the pin that is level checked if the bootloader backdoor is 56 int "ROM bootloader backdoor level" 61 Set the active level of the pin selected for the bootloader backdoor.
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/Zephyr-latest/doc/services/retention/ |
D | blinfo.rst | 3 Bootloader Information 6 The bootloader information (abbreviated to blinfo) subsystem is an extension of 7 the :ref:`retention_api` which allows for reading shared data from a bootloader 9 the information retrieved from the bootloader and storing it in the 15 To use the bootloader information subsystem, a retention area needs to be 16 created which has a retained data section as its parent, generally non-init RAM 20 .. code-block:: devicetree 24 compatible = "zephyr,memory-region", "mmio-sram"; 26 zephyr,memory-region = "RetainedMem"; 30 compatible = "zephyr,retained-ram"; [all …]
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/Zephyr-latest/soc/st/stm32/stm32f0x/ |
D | soc.c | 4 * SPDX-License-Identifier: Apache-2.0 15 #include <zephyr/linker/linker-defs.h> 27 * On Cortex-M0 platforms, the Vector Base address cannot be changed. 29 * A Zephyr image that is run from the mcuboot bootloader must relocate the 31 * bootloader. 33 * A zephyr image that is a bootloader does not have to relocate the 36 * Alternatively both switches SW_VECTOR_RELAY (for Bootloader image) and 37 * SW_VECTOR_RELAY_CLIENT (for image loaded by a bootloader) can be used to 43 * @note Zephyr applications that will not be loaded by a bootloader should 44 * pretend to be a bootloader if the SRAM vector table is not needed. [all …]
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/Zephyr-latest/samples/subsys/usb/dfu/ |
D | README.rst | 1 .. zephyr:code-sample:: usb-dfu 3 :relevant-api: _usb_device_core_api 19 partition layout. You SoC must run MCUboot as the stage 1 bootloader. 20 This sample is built as an application for the MCUboot bootloader. 33 to be loaded at the offset of SLOT-0. 40 .. code-block:: console 42 west build -b nrf52840dk/nrf52840 zephyr/samples/subsys/usb/dfu -d build-dfu -- \ 43 -DCONFIG_MCUBOOT_SIGNATURE_KEY_FILE=\"bootloader/mcuboot/root-rsa-2048.pem\" 45 Build and flash MCUboot bootloader for Zephyr project as it is described in 47 the USB DFU sample at the offset of SLOT-0. [all …]
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/Zephyr-latest/soc/atmel/sam0/common/ |
D | bossa.c | 4 * SPDX-License-Identifier: Apache-2.0 14 * Magic value that causes the bootloader to stay in bootloader mode instead of 22 #error Unsupported BOSSA bootloader variant 36 * bootloader. in bossa_reset() 42 top[-1] = DOUBLE_TAP_MAGIC; in bossa_reset() 53 return -ENODEV; in bossa_init()
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/Zephyr-latest/tests/boot/mcuboot_recovery_retention/ |
D | testcase.yaml | 4 # SPDX-License-Identifier: Apache-2.0 13 - "mcuboot_status: 0" 14 - "mcuboot_status: 2" 15 - "Waiting..." 16 - "mcuboot_status: 0" 17 - "mcuboot_status: 8" 18 - "Starting bootloader" 19 - "Secondary image: magic" 20 - "Boot source: none" 22 bootloader.mcuboot.recovery.retention: [all …]
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/Zephyr-latest/dts/bindings/options/ |
D | openthread,config.yaml | 2 # SPDX-License-Identifier: Apache-2.0 11 diag-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>, 13 bootloader-gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>; 20 diag-gpios: 21 type: phandle-array 26 bootloader-gpios: 27 type: phandle-array 29 This enables resetting to bootloader by triggering given GPIO pin. Property represents
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/Zephyr-latest/boards/ezurio/bl654_usb/ |
D | Kconfig.defconfig | 3 # Copyright (c) 2021-2022 Laird Connectivity 4 # SPDX-License-Identifier: Apache-2.0 8 # To let the nRF5 bootloader load an application, the application 9 # must be linked after Nordic MBR, that is factory-programmed on the board. 11 # Nordic nRF5 bootloader exists outside of the partitions specified in the 14 # the bootloader at the end of flash.
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/Zephyr-latest/boards/nordic/nrf52840dongle/ |
D | Kconfig.defconfig | 3 # Copyright (c) 2018-2023 Nordic Semiconductor ASA 5 # SPDX-License-Identifier: Apache-2.0 9 # To let the nRF5 bootloader load an application, the application 10 # must be linked after Nordic MBR, that is factory-programmed on the board. 12 # Nordic nRF5 bootloader exists outside of the partitions specified in the 19 # the bootloader Kconfig option has been disabled.
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D | Kconfig | 3 # Copyright (c) 2018-2023 Nordic Semiconductor ASA 4 # SPDX-License-Identifier: Apache-2.0 9 bool "Board has nRF5 bootloader" 13 nRF5 bootloader.
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D | fstab-stock.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 /* Flash partition table compatible with Nordic nRF5 bootloader */ 11 compatible = "fixed-partitions"; 12 #address-cells = <1>; 13 #size-cells = <1>; 26 label = "image-0"; 30 label = "image-1"; 38 /* Nordic nRF5 bootloader <0xe0000 0x1c000> 41 * are used by the nRF5 bootloader and MBR to store settings.
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/Zephyr-latest/boards/franzininho/esp32s2_franzininho/doc/ |
D | index.rst | 6 …n educational development board based on ESP32-S2 which is a highly integrated, low-power, single-… 7 designed to be secure and cost-effective, with a high performance and a rich set of IO capabilities… 11 - RSA-3072-based secure boot 12 - AES-XTS-256-based flash encryption 13 - Protected private key and device secrets from software access 14 - Cryptographic accelerators for enhanced performance 15 - Protection against physical fault injection attacks 16 - Various peripherals: 18 - 43x programmable GPIOs 19 - 14x configurable capacitive touch GPIOs [all …]
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/Zephyr-latest/tests/boot/test_mcuboot/ |
D | testcase.yaml | 7 - "I: Starting bootloader" 8 - "Launching primary slot application on (.*)" 9 - "Secondary application ready for swap, rebooting" 10 - "I: Starting swap using (.*)|I: Image 0 upgrade secondary slot -> primary slot" 11 - "Swapped application booted on (.*)" 13 bootloader.mcuboot: 16 - frdm_k22f 17 - frdm_k64f 18 - frdm_k82f 19 - frdm_ke17z [all …]
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/Zephyr-latest/modules/openthread/platform/ |
D | misc.c | 4 * SPDX-License-Identifier: Apache-2.0 21 "`bootloader-gpios` property missing from `openthread,config` compatible node"); 30 #include "platform-zephyr.h" 53 * To enable resetting to bootloader by triggering gpio pin, in otPlatResetToBootloader() 56 * `compatible = "openthread,config"` property and `bootloader-gpios` property, in otPlatResetToBootloader() 63 * bootloader-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; in otPlatResetToBootloader() 69 * Configuring pin flags in `bootloader-gpios` allows to choose in otPlatResetToBootloader()
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/Zephyr-latest/soc/espressif/esp32s3/ |
D | memory.h | 3 * SPDX-License-Identifier: Apache-2.0 19 #define SRAM2_USER_DRAM_SIZE (SRAM2_SIZE - CONFIG_ESP32S3_DATA_CACHE_SIZE) 21 /** Simplified memory map for the bootloader. 22 * Make sure the bootloader can load into main memory without overwriting itself. 24 * ESP32-S3 ROM static data usage is as follows: 25 * - 0x3fcd7e00 - 0x3fce9704: Shared buffers, used in UART/USB/SPI download mode only 26 * - 0x3fce9710 - 0x3fceb710: PRO CPU stack, can be reclaimed as heap after RTOS startup 27 * - 0x3fceb710 - 0x3fced710: APP CPU stack, can be reclaimed as heap after RTOS startup 28 * - 0x3fced710 - 0x3fcf0000: ROM .bss and .data (not easily reclaimable) 30 * The 2nd stage bootloader can take space up to the end of ROM shared [all …]
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/Zephyr-latest/boards/makerdiary/nrf52840_mdk_usb_dongle/ |
D | Kconfig | 5 # SPDX-License-Identifier: Apache-2.0 8 bool "Board has nRF5 bootloader" 13 nRF5 bootloader.
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D | fstab-stock.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 7 /* Flash partition table compatible with Nordic nRF5 bootloader */ 11 compatible = "fixed-partitions"; 12 #address-cells = <1>; 13 #size-cells = <1>; 25 label = "image-0"; 29 label = "image-1"; 37 label = "image-scratch"; 41 /* Nordic nRF5 bootloader <0xe0000 0x1c000> 44 * are used by the nRF5 bootloader and MBR to store settings.
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/Zephyr-latest/soc/espressif/esp32c6/ |
D | memory.h | 3 * SPDX-License-Identifier: Apache-2.0 7 /* LP-SRAM (16kB) memory */ 10 /* HP-SRAM (512kB) memory */ 15 /* ICache size is fixed to 32KB on ESP32-C6 */ 18 /** Simplified memory map for the bootloader. 19 * Make sure the bootloader can load into main memory without overwriting itself. 21 * ESP32-C6 ROM static data usage is as follows: 22 * - 0x4086ad08 - 0x4087c610: Shared buffers, used in UART/USB/SPI download mode only 23 * - 0x4087c610 - 0x4087e610: PRO CPU stack, can be reclaimed as heap after RTOS startup 24 * - 0x4087e610 - 0x40880000: ROM .bss and .data (not easily reclaimable) [all …]
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/Zephyr-latest/soc/espressif/esp32c2/ |
D | memory.h | 3 * SPDX-License-Identifier: Apache-2.0 16 /* ICache size is fixed to 16KB on ESP32-C2 */ 19 /** Simplified memory map for the bootloader. 20 * Make sure the bootloader can load into main memory without overwriting itself. 22 * ESP32-C2 ROM static data usage is as follows: 23 * - 0x3fccb264 - 0x3fcdcb70: Shared buffers, used in UART/USB/SPI download mode only 24 * - 0x3fcdcb70 - 0x3fcdeb70: PRO CPU stack, can be reclaimed as heap after RTOS startup 25 * - 0x3fcdeb70 - 0x3fce0000: ROM .bss and .data (not easily reclaimable) 27 * The 2nd stage bootloader can take space up to the end of ROM shared 42 /* For safety margin between bootloader data section and startup stacks */ [all …]
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/Zephyr-latest/soc/espressif/esp32s2/ |
D | memory.h | 3 * SPDX-License-Identifier: Apache-2.0 14 /** Simplified memory map for the bootloader. 15 * Make sure the bootloader can load into main memory without overwriting itself. 17 * ESP32-S2 ROM static data usage is as follows: 18 * - 0x3ffeab00 - 0x3fffc410: Shared buffers, used in UART/USB/SPI download mode only 19 * - 0x3fffc410 - 0x3fffe710: CPU stack, can be reclaimed as heap after RTOS startup 20 * - 0x3fffe710 - 0x40000000: ROM .bss and .data (not easily reclaimable) 22 * The 2nd stage bootloader can take space up to the end of ROM shared 35 /* For safety margin between bootloader data section and startup stacks */ 47 #define BOOTLOADER_USER_DRAM_END (DRAM_BUFFERS_START - BOOTLOADER_STACK_OVERHEAD) [all …]
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/Zephyr-latest/boards/adafruit/itsybitsy/doc/ |
D | index.rst | 16 * :abbr:`I2C (Inter-Integrated Circuit)` 17 * :abbr:`I2S (Inter-Integrated Sound)` 25 * :abbr:`UARTE (Universal asynchronous receiver-transmitter)` 31 - nRF52840 ARM Cortex-M4F CPU at 64MHz 32 - 1 MB of flash memory and 256 KB of SRAM 33 - 2 MB of QSPI flash 34 - A user LED 35 - A user switch 36 - An RGB DotStar LED 37 - Native USB port [all …]
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/Zephyr-latest/soc/espressif/esp32c3/ |
D | memory.h | 3 * SPDX-License-Identifier: Apache-2.0 14 /* ICache size is fixed to 16KB on ESP32-C3 */ 17 /** Simplified memory map for the bootloader. 18 * Make sure the bootloader can load into main memory without overwriting itself. 20 * ESP32-C3 ROM static data usage is as follows: 21 * - 0x3fccae00 - 0x3fcdc710: Shared buffers, used in UART/USB/SPI download mode only 22 * - 0x3fcdc710 - 0x3fcde710: PRO CPU stack, can be reclaimed as heap after RTOS startup 23 * - 0x3fcde710 - 0x3fce0000: ROM .bss and .data (not easily reclaimable) 25 * The 2nd stage bootloader can take space up to the end of ROM shared 46 /* For safety margin between bootloader data section and startup stacks */ [all …]
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/Zephyr-latest/soc/espressif/esp32/ |
D | memory.h | 3 * SPDX-License-Identifier: Apache-2.0 19 #define SRAM1_USER_SIZE (0x40000000 - SRAM1_DRAM_USER_START) 27 #define SRAM2_DRAM_USER_SIZE (SRAM2_DRAM_END - SRAM2_DRAM_USER_START) 29 /** Simplified memory map for the bootloader. 30 * Make sure the bootloader can load into main memory without overwriting itself. 33 * - 0x3ffae000 - 0x3ffb0000 (Reserved: data memory for ROM functions) 34 * - 0x3ffb0000 - 0x3ffe0000 (RAM bank 1 for application usage) 35 * - 0x3ffe0000 - 0x3ffe0440 (Reserved: data memory for ROM PRO CPU) 36 * - 0x3ffe3f20 - 0x3ffe4350 (Reserved: data memory for ROM APP CPU) 37 * - 0x3ffe4350 - 0x3ffe5230 (BT shm buffers) [all …]
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