1 /* 2 * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. 3 * SPDX-License-Identifier: Apache-2.0 4 */ 5 #pragma once 6 7 /* SRAM0 (32k) with adjacted SRAM1 (288k) 8 * Ibus and Dbus address space 9 */ 10 #define SRAM_IRAM_START (SRAM_DRAM_START + IRAM_DRAM_OFFSET) 11 #define SRAM_DRAM_START DT_REG_ADDR(DT_NODELABEL(sram0)) 12 #define SRAM_CACHE_SIZE (CONFIG_ESP32S2_INSTRUCTION_CACHE_SIZE + CONFIG_ESP32S2_DATA_CACHE_SIZE) 13 14 /** Simplified memory map for the bootloader. 15 * Make sure the bootloader can load into main memory without overwriting itself. 16 * 17 * ESP32-S2 ROM static data usage is as follows: 18 * - 0x3ffeab00 - 0x3fffc410: Shared buffers, used in UART/USB/SPI download mode only 19 * - 0x3fffc410 - 0x3fffe710: CPU stack, can be reclaimed as heap after RTOS startup 20 * - 0x3fffe710 - 0x40000000: ROM .bss and .data (not easily reclaimable) 21 * 22 * The 2nd stage bootloader can take space up to the end of ROM shared 23 * buffers area (0x3fffc410). For alignment purpose we shall use value (0x3fce9700). 24 */ 25 26 /* The offset between Dbus and Ibus. 27 * Used to convert between 0x4002xxxx and 0x3ffbxxxx addresses. 28 */ 29 #define IRAM_DRAM_OFFSET 0x70000 30 #define DRAM_BUFFERS_START 0x3ffea400 31 #define DRAM_BUFFERS_END 0x3fffc410 32 #define DRAM_ROM_CPU_STACK_START 0x3fffc410 33 #define DRAM_ROM_BSS_DATA_START 0x3fffe710 34 35 /* For safety margin between bootloader data section and startup stacks */ 36 #define BOOTLOADER_STACK_OVERHEAD 0x0 37 #define BOOTLOADER_DRAM_SEG_LEN 0x8000 38 #define BOOTLOADER_IRAM_LOADER_SEG_LEN 0x3000 39 #define BOOTLOADER_IRAM_SEG_LEN 0xa000 40 41 /* Set the limit for the application runtime dynamic allocations */ 42 #define DRAM_RESERVED_START DRAM_BUFFERS_END 43 44 /* Base address used for calculating memory layout 45 * counted from Dbus backwards and back to the Ibus 46 */ 47 #define BOOTLOADER_USER_DRAM_END (DRAM_BUFFERS_START - BOOTLOADER_STACK_OVERHEAD) 48 49 /* Start of the lower region is determined by region size and the end of the higher region */ 50 #define BOOTLOADER_IRAM_LOADER_SEG_START \ 51 (BOOTLOADER_USER_DRAM_END - BOOTLOADER_IRAM_LOADER_SEG_LEN + IRAM_DRAM_OFFSET) 52 #define BOOTLOADER_IRAM_SEG_START (BOOTLOADER_IRAM_LOADER_SEG_START - BOOTLOADER_IRAM_SEG_LEN) 53 #define BOOTLOADER_DRAM_SEG_START \ 54 (BOOTLOADER_IRAM_SEG_START - BOOTLOADER_DRAM_SEG_LEN - IRAM_DRAM_OFFSET) 55 56 /* Flash */ 57 #ifdef CONFIG_FLASH_SIZE 58 #define FLASH_SIZE CONFIG_FLASH_SIZE 59 #else 60 #define FLASH_SIZE 0x400000 61 #endif 62 63 /* Cached memories */ 64 #define CACHE_ALIGN CONFIG_MMU_PAGE_SIZE 65 #define IROM_SEG_ORG 0x40080000 66 #define IROM_SEG_LEN 0x780000 67 #define DROM_SEG_ORG 0x3f000000 68 #define DROM_SEG_LEN FLASH_SIZE 69
