1 /* 2 * Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd. 3 * SPDX-License-Identifier: Apache-2.0 4 */ 5 #pragma once 6 7 /* LP-SRAM (16kB) memory */ 8 #define LPSRAM_IRAM_START DT_REG_ADDR(DT_NODELABEL(sramlp)) 9 #define LPSRAM_SIZE DT_REG_SIZE(DT_NODELABEL(sramlp)) 10 /* HP-SRAM (512kB) memory */ 11 #define HPSRAM_START DT_REG_ADDR(DT_NODELABEL(sramhp)) 12 #define HPSRAM_SIZE DT_REG_SIZE(DT_NODELABEL(sramhp)) 13 #define HPSRAM_DRAM_START HPSRAM_START 14 #define HPSRAM_IRAM_START HPSRAM_START 15 /* ICache size is fixed to 32KB on ESP32-C6 */ 16 #define ICACHE_SIZE 0x8000 17 18 /** Simplified memory map for the bootloader. 19 * Make sure the bootloader can load into main memory without overwriting itself. 20 * 21 * ESP32-C6 ROM static data usage is as follows: 22 * - 0x4086ad08 - 0x4087c610: Shared buffers, used in UART/USB/SPI download mode only 23 * - 0x4087c610 - 0x4087e610: PRO CPU stack, can be reclaimed as heap after RTOS startup 24 * - 0x4087e610 - 0x40880000: ROM .bss and .data (not easily reclaimable) 25 * 26 * The 2nd stage bootloader can take space up to the end of ROM shared 27 * buffers area (0x4087c610). 28 */ 29 30 #define DRAM_BUFFERS_START 0x4086ad08 31 #define DRAM_BUFFERS_END 0x4087c610 32 #define DRAM_STACK_START DRAM_BUFFERS_END 33 #define DRAM_ROM_BSS_DATA_START 0x4087e610 34 35 /* Set the limit for the application runtime dynamic allocations */ 36 #define DRAM_RESERVED_START DRAM_BUFFERS_END 37 38 /* For safety margin between bootloader data section and startup stacks */ 39 #define BOOTLOADER_STACK_OVERHEAD 0x0 40 /* These lengths can be adjusted, if necessary: FIXME: optimize ram usage */ 41 #define BOOTLOADER_DRAM_SEG_LEN 0xA000 42 #define BOOTLOADER_IRAM_LOADER_SEG_LEN 0x3000 43 #define BOOTLOADER_IRAM_SEG_LEN 0xC000 44 45 /* Base address used for calculating memory layout 46 * counted from Dbus backwards and back to the Ibus 47 */ 48 #define BOOTLOADER_USER_SRAM_END (DRAM_BUFFERS_START - BOOTLOADER_STACK_OVERHEAD) 49 50 /* Start of the lower region is determined by region size and the end of the higher region */ 51 #define BOOTLOADER_IRAM_LOADER_SEG_START (BOOTLOADER_USER_SRAM_END - BOOTLOADER_IRAM_LOADER_SEG_LEN) 52 #define BOOTLOADER_IRAM_SEG_START (BOOTLOADER_IRAM_LOADER_SEG_START - BOOTLOADER_IRAM_SEG_LEN) 53 #define BOOTLOADER_DRAM_SEG_START (BOOTLOADER_IRAM_SEG_START - BOOTLOADER_DRAM_SEG_LEN) 54 55 /* Flash */ 56 #ifdef CONFIG_FLASH_SIZE 57 #define FLASH_SIZE CONFIG_FLASH_SIZE 58 #else 59 #define FLASH_SIZE 0x400000 60 #endif 61 62 /* Cached memory */ 63 #define CACHE_ALIGN CONFIG_MMU_PAGE_SIZE 64 #define IROM_SEG_ORG 0x42000000 65 #define IROM_SEG_LEN FLASH_SIZE 66 #define DROM_SEG_ORG 0x42800000 67 #define DROM_SEG_LEN FLASH_SIZE 68
