/hal_stm32-3.5.0/stm32cube/stm32wlxx/drivers/include/ |
D | stm32wlxx_hal_rcc.h | 818 #define __HAL_RCC_GPIOA_CLK_DISABLE() LL_C2_AHB2_GRP1_DisableClock(LL_C2_AHB2_GRP1_PE… macro 828 #define __HAL_RCC_GPIOA_CLK_DISABLE() LL_AHB2_GRP1_DisableClock(LL_AHB2_GRP1_PERIPH_G… macro
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/hal_stm32-3.5.0/stm32cube/stm32f1xx/drivers/include/ |
D | stm32f1xx_hal_rcc.h | 568 #define __HAL_RCC_GPIOA_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_IOPAEN)) macro
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/hal_stm32-3.5.0/stm32cube/stm32l0xx/drivers/include/ |
D | stm32l0xx_hal_rcc.h | 749 #define __HAL_RCC_GPIOA_CLK_DISABLE() CLEAR_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN) macro
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/hal_stm32-3.5.0/stm32cube/stm32f4xx/drivers/include/ |
D | stm32f4xx_hal_rcc.h | 427 #define __HAL_RCC_GPIOA_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOAEN)) macro
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/hal_stm32-3.5.0/stm32cube/stm32f0xx/drivers/include/ |
D | stm32f0xx_hal_rcc.h | 677 #define __HAL_RCC_GPIOA_CLK_DISABLE() (RCC->AHBENR &= ~(RCC_AHBENR_GPIOAEN)) macro
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/hal_stm32-3.5.0/stm32cube/stm32f3xx/drivers/include/ |
D | stm32f3xx_hal_rcc.h | 751 #define __HAL_RCC_GPIOA_CLK_DISABLE() (RCC->AHBENR &= ~(RCC_AHBENR_GPIOAEN)) macro
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/hal_stm32-3.5.0/stm32cube/stm32c0xx/drivers/include/ |
D | stm32c0xx_hal_rcc.h | 642 #define __HAL_RCC_GPIOA_CLK_DISABLE() CLEAR_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN) macro
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/hal_stm32-3.5.0/stm32cube/stm32l1xx/drivers/include/ |
D | stm32l1xx_hal_rcc.h | 698 #define __HAL_RCC_GPIOA_CLK_DISABLE() (RCC->AHBENR &= ~(RCC_AHBENR_GPIOAEN)) macro
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/hal_stm32-3.5.0/stm32cube/stm32wbaxx/drivers/include/ |
D | stm32wbaxx_hal_rcc.h | 701 #define __HAL_RCC_GPIOA_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN) macro
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/hal_stm32-3.5.0/stm32cube/stm32f2xx/drivers/include/ |
D | stm32f2xx_hal_rcc.h | 515 #define __HAL_RCC_GPIOA_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOAEN)) macro
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/hal_stm32-3.5.0/stm32cube/stm32mp1xx/drivers/include/ |
D | stm32mp1xx_hal_rcc.h | 1740 #define __HAL_RCC_GPIOA_CLK_DISABLE() (RCC->MP_AHB4ENCLRR = RCC_MP_AHB4ENCLRR_GPIOAEN) macro 2396 #define __HAL_RCC_GPIOA_CLK_DISABLE() (RCC->MC_AHB4ENCLRR = RCC_MC_AHB4ENCLRR_GPIOAEN) macro
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/hal_stm32-3.5.0/stm32cube/stm32g0xx/drivers/include/ |
D | stm32g0xx_hal_rcc.h | 955 #define __HAL_RCC_GPIOA_CLK_DISABLE() CLEAR_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN) macro
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/hal_stm32-3.5.0/stm32cube/stm32g4xx/drivers/include/ |
D | stm32g4xx_hal_rcc.h | 727 #define __HAL_RCC_GPIOA_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN) macro
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/hal_stm32-3.5.0/stm32cube/stm32wbxx/drivers/include/ |
D | stm32wbxx_hal_rcc.h | 922 #define __HAL_RCC_GPIOA_CLK_DISABLE() LL_AHB2_GRP1_DisableClock(LL_AHB2_GRP1_PERIPH_GPIOA) macro
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/hal_stm32-3.5.0/stm32cube/stm32l5xx/drivers/include/ |
D | stm32l5xx_hal_rcc.h | 859 #define __HAL_RCC_GPIOA_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN) macro
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/hal_stm32-3.5.0/stm32cube/stm32u5xx/drivers/include/ |
D | stm32u5xx_hal_rcc.h | 1147 #define __HAL_RCC_GPIOA_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR1, RCC_AHB2ENR1_GPIOAEN) macro
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/hal_stm32-3.5.0/stm32cube/stm32f7xx/drivers/include/ |
D | stm32f7xx_hal_rcc_ex.h | 732 #define __HAL_RCC_GPIOA_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOAEN)) macro
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/hal_stm32-3.5.0/stm32cube/stm32l4xx/drivers/include/ |
D | stm32l4xx_hal_rcc.h | 921 #define __HAL_RCC_GPIOA_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN) macro
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/hal_stm32-3.5.0/stm32cube/stm32h5xx/drivers/include/ |
D | stm32h5xx_hal_rcc.h | 1081 #define __HAL_RCC_GPIOA_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN) macro
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/hal_stm32-3.5.0/stm32cube/stm32h7xx/drivers/include/ |
D | stm32h7xx_hal_rcc.h | 1582 #define __HAL_RCC_GPIOA_CLK_DISABLE() (RCC->AHB4ENR) &= ~ (RCC_AHB4ENR_GPIOAEN) macro
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