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Searched defs:__HAL_RCC_GPIOA_CLK_DISABLE (Results 1 – 20 of 20) sorted by relevance

/hal_stm32-3.5.0/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_hal_rcc.h818 #define __HAL_RCC_GPIOA_CLK_DISABLE() LL_C2_AHB2_GRP1_DisableClock(LL_C2_AHB2_GRP1_PE… macro
828 #define __HAL_RCC_GPIOA_CLK_DISABLE() LL_AHB2_GRP1_DisableClock(LL_AHB2_GRP1_PERIPH_G… macro
/hal_stm32-3.5.0/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_hal_rcc.h568 #define __HAL_RCC_GPIOA_CLK_DISABLE() (RCC->APB2ENR &= ~(RCC_APB2ENR_IOPAEN)) macro
/hal_stm32-3.5.0/stm32cube/stm32l0xx/drivers/include/
Dstm32l0xx_hal_rcc.h749 #define __HAL_RCC_GPIOA_CLK_DISABLE() CLEAR_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN) macro
/hal_stm32-3.5.0/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_hal_rcc.h427 #define __HAL_RCC_GPIOA_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOAEN)) macro
/hal_stm32-3.5.0/stm32cube/stm32f0xx/drivers/include/
Dstm32f0xx_hal_rcc.h677 #define __HAL_RCC_GPIOA_CLK_DISABLE() (RCC->AHBENR &= ~(RCC_AHBENR_GPIOAEN)) macro
/hal_stm32-3.5.0/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_hal_rcc.h751 #define __HAL_RCC_GPIOA_CLK_DISABLE() (RCC->AHBENR &= ~(RCC_AHBENR_GPIOAEN)) macro
/hal_stm32-3.5.0/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_hal_rcc.h642 #define __HAL_RCC_GPIOA_CLK_DISABLE() CLEAR_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN) macro
/hal_stm32-3.5.0/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_hal_rcc.h698 #define __HAL_RCC_GPIOA_CLK_DISABLE() (RCC->AHBENR &= ~(RCC_AHBENR_GPIOAEN)) macro
/hal_stm32-3.5.0/stm32cube/stm32wbaxx/drivers/include/
Dstm32wbaxx_hal_rcc.h701 #define __HAL_RCC_GPIOA_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN) macro
/hal_stm32-3.5.0/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_hal_rcc.h515 #define __HAL_RCC_GPIOA_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOAEN)) macro
/hal_stm32-3.5.0/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_hal_rcc.h1740 #define __HAL_RCC_GPIOA_CLK_DISABLE() (RCC->MP_AHB4ENCLRR = RCC_MP_AHB4ENCLRR_GPIOAEN) macro
2396 #define __HAL_RCC_GPIOA_CLK_DISABLE() (RCC->MC_AHB4ENCLRR = RCC_MC_AHB4ENCLRR_GPIOAEN) macro
/hal_stm32-3.5.0/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_hal_rcc.h955 #define __HAL_RCC_GPIOA_CLK_DISABLE() CLEAR_BIT(RCC->IOPENR, RCC_IOPENR_GPIOAEN) macro
/hal_stm32-3.5.0/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_hal_rcc.h727 #define __HAL_RCC_GPIOA_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN) macro
/hal_stm32-3.5.0/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_hal_rcc.h922 #define __HAL_RCC_GPIOA_CLK_DISABLE() LL_AHB2_GRP1_DisableClock(LL_AHB2_GRP1_PERIPH_GPIOA) macro
/hal_stm32-3.5.0/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_hal_rcc.h859 #define __HAL_RCC_GPIOA_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN) macro
/hal_stm32-3.5.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_hal_rcc.h1147 #define __HAL_RCC_GPIOA_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR1, RCC_AHB2ENR1_GPIOAEN) macro
/hal_stm32-3.5.0/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_hal_rcc_ex.h732 #define __HAL_RCC_GPIOA_CLK_DISABLE() (RCC->AHB1ENR &= ~(RCC_AHB1ENR_GPIOAEN)) macro
/hal_stm32-3.5.0/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_hal_rcc.h921 #define __HAL_RCC_GPIOA_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN) macro
/hal_stm32-3.5.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_hal_rcc.h1081 #define __HAL_RCC_GPIOA_CLK_DISABLE() CLEAR_BIT(RCC->AHB2ENR, RCC_AHB2ENR_GPIOAEN) macro
/hal_stm32-3.5.0/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_hal_rcc.h1582 #define __HAL_RCC_GPIOA_CLK_DISABLE() (RCC->AHB4ENR) &= ~ (RCC_AHB4ENR_GPIOAEN) macro