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Searched defs:CPUSS_DW1_CH_NR (Results 1 – 13 of 13) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dcyw20829B0_config.h722 #define CPUSS_DW1_CH_NR 1u macro
Dcyw20829_config.h722 #define CPUSS_DW1_CH_NR 1u macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dpsoc6_01_config.h1757 #define CPUSS_DW1_CH_NR 16u macro
Dpsoc6_03_config.h1451 #define CPUSS_DW1_CH_NR 32u macro
Dpsoc6_04_config.h1417 #define CPUSS_DW1_CH_NR 32u macro
Dpsoc6_02_config.h1926 #define CPUSS_DW1_CH_NR 29u macro
Dtviibe1m_config.h1900 #define CPUSS_DW1_CH_NR 33u macro
Dfx3g2_config.h2087 #define CPUSS_DW1_CH_NR 24u macro
Dtviibe2m_config.h2059 #define CPUSS_DW1_CH_NR 44u macro
Dtviibe4m_config.h2062 #define CPUSS_DW1_CH_NR 44u macro
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dxmc7100_config.h2200 #define CPUSS_DW1_CH_NR 58u macro
Dtviic2d6m_config.h2347 #define CPUSS_DW1_CH_NR 84u macro
Dxmc7200_config.h2785 #define CPUSS_DW1_CH_NR 65u macro