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Searched refs:ADC_CSR_OVR_SLV_Pos (Results 1 – 25 of 106) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h1904 #define ADC_CSR_OVR_SLV_Pos (20U) macro
1905 #define ADC_CSR_OVR_SLV_Msk (0x1UL << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */
Dstm32f318xx.h1905 #define ADC_CSR_OVR_SLV_Pos (20U) macro
1906 #define ADC_CSR_OVR_SLV_Msk (0x1UL << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */
Dstm32f302x8.h2013 #define ADC_CSR_OVR_SLV_Pos (20U) macro
2014 #define ADC_CSR_OVR_SLV_Msk (0x1UL << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */
Dstm32f328xx.h1964 #define ADC_CSR_OVR_SLV_Pos (20U) macro
1965 #define ADC_CSR_OVR_SLV_Msk (0x1UL << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */
Dstm32f302xc.h2048 #define ADC_CSR_OVR_SLV_Pos (20U) macro
2049 #define ADC_CSR_OVR_SLV_Msk (0x1UL << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */
Dstm32f303x8.h1965 #define ADC_CSR_OVR_SLV_Pos (20U) macro
1966 #define ADC_CSR_OVR_SLV_Msk (0x1UL << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */
Dstm32f358xx.h2190 #define ADC_CSR_OVR_SLV_Pos (20U) macro
2191 #define ADC_CSR_OVR_SLV_Msk (0x1UL << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */
Dstm32f303xc.h2232 #define ADC_CSR_OVR_SLV_Pos (20U) macro
2233 #define ADC_CSR_OVR_SLV_Msk (0x1UL << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */
Dstm32f302xe.h2139 #define ADC_CSR_OVR_SLV_Pos (20U) macro
2140 #define ADC_CSR_OVR_SLV_Msk (0x1UL << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */
Dstm32f303xe.h2343 #define ADC_CSR_OVR_SLV_Pos (20U) macro
2344 #define ADC_CSR_OVR_SLV_Msk (0x1UL << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */
Dstm32f398xx.h2299 #define ADC_CSR_OVR_SLV_Pos (20U) macro
2300 #define ADC_CSR_OVR_SLV_Msk (0x1UL << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */
Dstm32f334x8.h2150 #define ADC_CSR_OVR_SLV_Pos (20U) macro
2151 #define ADC_CSR_OVR_SLV_Msk (0x1UL << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */
/hal_stm32-latest/stm32cube/stm32g4xx/soc/
Dstm32g411xb.h1988 #define ADC_CSR_OVR_SLV_Pos (20U) macro
1989 #define ADC_CSR_OVR_SLV_Msk (0x1UL << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */
Dstm32g411xc.h2025 #define ADC_CSR_OVR_SLV_Pos (20U) macro
2026 #define ADC_CSR_OVR_SLV_Msk (0x1UL << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */
Dstm32g441xx.h2146 #define ADC_CSR_OVR_SLV_Pos (20U) macro
2147 #define ADC_CSR_OVR_SLV_Msk (0x1UL << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */
Dstm32gbk1cb.h2098 #define ADC_CSR_OVR_SLV_Pos (20U) macro
2099 #define ADC_CSR_OVR_SLV_Msk (0x1UL << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */
Dstm32g431xx.h2112 #define ADC_CSR_OVR_SLV_Pos (20U) macro
2113 #define ADC_CSR_OVR_SLV_Msk (0x1UL << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */
Dstm32g4a1xx.h2226 #define ADC_CSR_OVR_SLV_Pos (20U) macro
2227 #define ADC_CSR_OVR_SLV_Msk (0x1UL << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */
Dstm32g491xx.h2192 #define ADC_CSR_OVR_SLV_Pos (20U) macro
2193 #define ADC_CSR_OVR_SLV_Msk (0x1UL << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */
Dstm32g473xx.h2281 #define ADC_CSR_OVR_SLV_Pos (20U) macro
2282 #define ADC_CSR_OVR_SLV_Msk (0x1UL << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */
Dstm32g471xx.h2203 #define ADC_CSR_OVR_SLV_Pos (20U) macro
2204 #define ADC_CSR_OVR_SLV_Msk (0x1UL << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */
Dstm32g483xx.h2315 #define ADC_CSR_OVR_SLV_Pos (20U) macro
2316 #define ADC_CSR_OVR_SLV_Msk (0x1UL << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */
/hal_stm32-latest/stm32cube/stm32l4xx/soc/
Dstm32l422xx.h2109 #define ADC_CSR_OVR_SLV_Pos (20U) macro
2110 #define ADC_CSR_OVR_SLV_Msk (0x1UL << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */
Dstm32l412xx.h2074 #define ADC_CSR_OVR_SLV_Pos (20U) macro
2075 #define ADC_CSR_OVR_SLV_Msk (0x1UL << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h2589 #define ADC_CSR_OVR_SLV_Pos (20U) macro
2590 #define ADC_CSR_OVR_SLV_Msk (0x1UL << ADC_CSR_OVR_SLV_Pos) /*!< 0x00100000 */

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