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Searched refs:WRITE_BIT (Results 1 – 25 of 68) sorted by relevance

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/Zephyr-latest/drivers/pinctrl/
Dpinctrl_eos_s3.c71 WRITE_BIT(reg_value, PAD_OUTPUT_EN_BIT, pin->output_enable ? 0 : 1); in pinctrl_eos_s3_configure_pin()
74 WRITE_BIT(reg_value, PAD_INPUT_EN_BIT, pin->input_enable); in pinctrl_eos_s3_configure_pin()
75 WRITE_BIT(reg_value, PAD_SLEW_RATE_BIT, pin->slew_rate); in pinctrl_eos_s3_configure_pin()
76 WRITE_BIT(reg_value, PAD_SCHMITT_EN_BIT, pin->schmitt_enable); in pinctrl_eos_s3_configure_pin()
77 WRITE_BIT(reg_value, PAD_CTRL_SEL_BIT0, pin->control_selection & BIT(0)); in pinctrl_eos_s3_configure_pin()
78 WRITE_BIT(reg_value, PAD_CTRL_SEL_BIT1, pin->control_selection & BIT(1)); in pinctrl_eos_s3_configure_pin()
82 WRITE_BIT(reg_value, PAD_DRIVE_STRENGTH_BIT0, 0); in pinctrl_eos_s3_configure_pin()
83 WRITE_BIT(reg_value, PAD_DRIVE_STRENGTH_BIT1, 0); in pinctrl_eos_s3_configure_pin()
86 WRITE_BIT(reg_value, PAD_DRIVE_STRENGTH_BIT0, 1); in pinctrl_eos_s3_configure_pin()
87 WRITE_BIT(reg_value, PAD_DRIVE_STRENGTH_BIT1, 0); in pinctrl_eos_s3_configure_pin()
[all …]
Dpinctrl_ene_kb1200.c72 WRITE_BIT(gpio_regs->GPIOFS, pin, 0); in kb1200_config_pin()
77 WRITE_BIT(gcfg_regs->GPIOALT, 0, func); in kb1200_config_pin()
86 WRITE_BIT(gcfg_regs->GPIOALT, 1, func); in kb1200_config_pin()
89 WRITE_BIT(gcfg_regs->GPIOALT, 2, func); in kb1200_config_pin()
92 WRITE_BIT(gcfg_regs->GPIOALT, 3, func); in kb1200_config_pin()
95 WRITE_BIT(gcfg_regs->GPIOALT, 4, func); in kb1200_config_pin()
98 WRITE_BIT(gcfg_regs->GPIOALT, 5, func); in kb1200_config_pin()
101 WRITE_BIT(gcfg_regs->GPIOALT, 6, func); in kb1200_config_pin()
104 WRITE_BIT(gcfg_regs->GPIOALT, 7, func); in kb1200_config_pin()
107 WRITE_BIT(gcfg_regs->GPIOALT, 8, func); in kb1200_config_pin()
[all …]
/Zephyr-latest/drivers/gpio/
Dgpio_ene_kb1200.c44 WRITE_BIT(config->gpio_regs->GPIOFS, pin, 0); in kb1200_gpio_pin_configure()
46 WRITE_BIT(config->gpio_regs->GPIOIE, pin, 1); in kb1200_gpio_pin_configure()
49 WRITE_BIT(config->gpio_regs->GPIOOD, pin, 1); in kb1200_gpio_pin_configure()
52 WRITE_BIT(config->gpio_regs->GPIOOD, pin, 0); in kb1200_gpio_pin_configure()
55 WRITE_BIT(config->gpio_regs->GPIOPU, pin, 1); in kb1200_gpio_pin_configure()
57 WRITE_BIT(config->gpio_regs->GPIOPU, pin, 0); in kb1200_gpio_pin_configure()
60 WRITE_BIT(config->gpio_regs->GPIOD, pin, 1); in kb1200_gpio_pin_configure()
62 WRITE_BIT(config->gpio_regs->GPIOD, pin, 0); in kb1200_gpio_pin_configure()
64 WRITE_BIT(config->gpio_regs->GPIOOE, pin, 1); in kb1200_gpio_pin_configure()
66 WRITE_BIT(config->gpio_regs->GPIOOE, pin, 0); in kb1200_gpio_pin_configure()
[all …]
Dgpio_renesas_ra_ioport.c86 WRITE_BIT(clear, i, 1); in gpio_ra_pin_configure()
112 WRITE_BIT(pfs_cfg, R_PFS_PORT_PIN_PmnPFS_PODR_Pos, 1); in gpio_ra_pin_configure()
115 WRITE_BIT(pfs_cfg, R_PFS_PORT_PIN_PmnPFS_PDR_Pos, 1); in gpio_ra_pin_configure()
119 WRITE_BIT(pfs_cfg, R_PFS_PORT_PIN_PmnPFS_NCODR_Pos, 1); in gpio_ra_pin_configure()
123 WRITE_BIT(pfs_cfg, R_PFS_PORT_PIN_PmnPFS_PCR_Pos, 1); in gpio_ra_pin_configure()
153 WRITE_BIT(pfs_cfg, R_PFS_PORT_PIN_PmnPFS_ISEL_Pos, 1); in gpio_ra_pin_configure()
168 WRITE_BIT(pfs_cfg, R_PFS_PORT_PIN_PmnPFS_ISEL_Pos, 0); in gpio_ra_pin_configure()
Dgpio_aw9523b.c117 WRITE_BIT(data->prev_value, pin, sys_get_le16(buf) & BIT(pin)); in gpio_aw9523b_pin_configure()
121 WRITE_BIT(data->falling_event_pins, pin, 0); in gpio_aw9523b_pin_configure()
122 WRITE_BIT(data->rising_event_pins, pin, 0); in gpio_aw9523b_pin_configure()
297 WRITE_BIT(data->falling_event_pins, pin, trig & GPIO_INT_HIGH_1); in gpio_aw9523b_pin_interrupt_configure()
298 WRITE_BIT(data->rising_event_pins, pin, trig & GPIO_INT_LOW_0); in gpio_aw9523b_pin_interrupt_configure()
300 WRITE_BIT(data->falling_event_pins, pin, trig & GPIO_INT_LOW_0); in gpio_aw9523b_pin_interrupt_configure()
301 WRITE_BIT(data->rising_event_pins, pin, trig & GPIO_INT_HIGH_1); in gpio_aw9523b_pin_interrupt_configure()
320 WRITE_BIT(data->prev_value, pin, sys_get_le16(buf) & BIT(pin)); in gpio_aw9523b_pin_interrupt_configure()
322 WRITE_BIT(data->falling_event_pins, pin, 0); in gpio_aw9523b_pin_interrupt_configure()
323 WRITE_BIT(data->rising_event_pins, pin, 0); in gpio_aw9523b_pin_interrupt_configure()
Dgpio_si32.c129 WRITE_BIT(data->trig_low, pin, 0); in gpio_si32_pin_interrupt_configure()
130 WRITE_BIT(data->trig_high, pin, 0); in gpio_si32_pin_interrupt_configure()
141 WRITE_BIT(data->trig_low, pin, trig & GPIO_INT_TRIG_LOW); in gpio_si32_pin_interrupt_configure()
142 WRITE_BIT(data->trig_high, pin, trig & GPIO_INT_TRIG_HIGH); in gpio_si32_pin_interrupt_configure()
Dgpio_bd8lb600fs.c86 WRITE_BIT(data->state, pin, 0); in bd8lb600fs_gpio_pin_configure()
88 WRITE_BIT(data->state, pin, 1); in bd8lb600fs_gpio_pin_configure()
91 WRITE_BIT(data->configured, pin, 1); in bd8lb600fs_gpio_pin_configure()
Dgpio_imx.c107 WRITE_BIT(base->GDIR, pin, 1U); in imx_gpio_configure()
110 WRITE_BIT(base->GDIR, pin, 0U); in imx_gpio_configure()
226 WRITE_BIT(base->EDGE_SEL, pin, trig == GPIO_INT_TRIG_BOTH); in imx_gpio_pin_interrupt_configure()
227 WRITE_BIT(base->ISR, pin, mode != GPIO_INT_MODE_DISABLED); in imx_gpio_pin_interrupt_configure()
228 WRITE_BIT(base->IMR, pin, mode != GPIO_INT_MODE_DISABLED); in imx_gpio_pin_interrupt_configure()
Dgpio_mcux_igpio.c214 WRITE_BIT(base->GDIR, pin, flags & GPIO_OUTPUT); in mcux_igpio_configure()
288 WRITE_BIT(base->IMR, pin, 0); in mcux_igpio_pin_interrupt_configure()
319 WRITE_BIT(base->EDGE_SEL, pin, trig == GPIO_INT_TRIG_BOTH); in mcux_igpio_pin_interrupt_configure()
320 WRITE_BIT(base->ISR, pin, 1); in mcux_igpio_pin_interrupt_configure()
321 WRITE_BIT(base->IMR, pin, 1); in mcux_igpio_pin_interrupt_configure()
Dgpio_tle9104.c98 WRITE_BIT(data->state, pin, 0); in tle9104_gpio_pin_configure()
100 WRITE_BIT(data->state, pin, 1); in tle9104_gpio_pin_configure()
103 WRITE_BIT(data->configured, pin, 1); in tle9104_gpio_pin_configure()
Dgpio_pca95xx.c437 WRITE_BIT(reg_pud, pin, (flags & GPIO_PULL_UP) != 0U); in setup_pin_pullupdown()
448 WRITE_BIT(reg_pud, pin, in setup_pin_pullupdown()
707 WRITE_BIT(reg_out, pin, (mode == GPIO_INT_MODE_DISABLED)); in gpio_pca95xx_pin_interrupt_configure()
721 WRITE_BIT(drv_data->interrupts.edge_rising, pin, (enabled && in gpio_pca95xx_pin_interrupt_configure()
723 WRITE_BIT(drv_data->interrupts.edge_falling, pin, (enabled && in gpio_pca95xx_pin_interrupt_configure()
725 WRITE_BIT(drv_data->interrupts.level_high, pin, (enabled && in gpio_pca95xx_pin_interrupt_configure()
727 WRITE_BIT(drv_data->interrupts.level_low, pin, (enabled && in gpio_pca95xx_pin_interrupt_configure()
Dgpio_rzt2m.c226 WRITE_BIT(*pm_reg, pin * 2, flags & GPIO_INPUT); in rzt2m_gpio_configure()
227 WRITE_BIT(*pm_reg, pin * 2 + 1, flags & GPIO_OUTPUT); in rzt2m_gpio_configure()
335 WRITE_BIT(*pmc_reg, pin, 0); in rzt2m_gpio_pin_interrupt_configure()
375 WRITE_BIT(*pmc_reg, pin, 1); /* enable special function on selected pin */ in rzt2m_gpio_pin_interrupt_configure()
/Zephyr-latest/subsys/bluetooth/services/ots/
Dots_dir_list_internal.h66 WRITE_BIT((flags), BT_OTS_DIR_LIST_FLAG_TYPE_128, 1)
73 WRITE_BIT((flags), BT_OTS_DIR_LIST_FLAG_CUR_SIZE, 1)
80 WRITE_BIT((flags), BT_OTS_DIR_LIST_FLAG_ALLOC_SIZE, 1)
87 WRITE_BIT((flags), BT_OTS_DIR_LIST_FLAG_FIRST_CREATED, 1)
94 WRITE_BIT((flags), BT_OTS_DIR_LIST_FLAG_LAST_MODIFIED, 1)
101 WRITE_BIT((flags), BT_OTS_DIR_LIST_FLAG_PROPERTIES, 1)
108 WRITE_BIT((flags), BT_OTS_DIR_LIST_FLAG_EXTENDED, 1)
/Zephyr-latest/include/zephyr/bluetooth/services/
Dots.h107 WRITE_BIT(prop, BT_OTS_OBJ_PROP_DELETE, 1)
114 WRITE_BIT(prop, BT_OTS_OBJ_PROP_EXECUTE, 1)
121 WRITE_BIT(prop, BT_OTS_OBJ_PROP_READ, 1)
128 WRITE_BIT(prop, BT_OTS_OBJ_PROP_WRITE, 1)
135 WRITE_BIT(prop, BT_OTS_OBJ_PROP_APPEND, 1)
142 WRITE_BIT(prop, BT_OTS_OBJ_PROP_TRUNCATE, 1)
149 WRITE_BIT(prop, BT_OTS_OBJ_PROP_PATCH, 1)
156 WRITE_BIT(prop, BT_OTS_OBJ_PROP_MARKED, 1)
270 WRITE_BIT(feat, BT_OTS_OACP_FEAT_CREATE, 1)
277 WRITE_BIT(feat, BT_OTS_OACP_FEAT_DELETE, 1)
[all …]
/Zephyr-latest/drivers/sensor/maxim/max31865/
Dmax31865.c138 WRITE_BIT(data->config_control_bits, 7, enable); in max31865_set_vbias()
146 WRITE_BIT(data->config_control_bits, 4, enable); in max31865_set_three_wire()
186 WRITE_BIT(data->config_control_bits, 1, 1); in max31865_fault_register()
191 WRITE_BIT(data->config_control_bits, 1, 0); in max31865_fault_register()
255 WRITE_BIT(data->config_control_bits, 6, config->conversion_mode); in max31865_init()
256 WRITE_BIT(data->config_control_bits, 5, config->one_shot); in max31865_init()
258 WRITE_BIT(data->config_control_bits, 0, config->filter_50hz); in max31865_init()
/Zephyr-latest/tests/posix/signals/src/
Dmain.c63 WRITE_BIT(target.sig[0], signo, 1); in ZTEST()
72 WRITE_BIT(target.sig[0], signo, 1); in ZTEST()
82 WRITE_BIT(target.sig[0], signo, 1); in ZTEST()
84 WRITE_BIT(target.sig[1], (signo)-BITS_PER_LONG, 1); in ZTEST()
94 WRITE_BIT(target.sig[signo / BITS_PER_LONG], signo % BITS_PER_LONG, 1); in ZTEST()
124 WRITE_BIT(target.sig[0], signo, 0); in ZTEST()
133 WRITE_BIT(target.sig[0], signo, 0); in ZTEST()
143 WRITE_BIT(target.sig[0], signo, 0); in ZTEST()
145 WRITE_BIT(target.sig[1], (signo)-BITS_PER_LONG, 0); in ZTEST()
155 WRITE_BIT(target.sig[signo / BITS_PER_LONG], signo % BITS_PER_LONG, 0); in ZTEST()
[all …]
/Zephyr-latest/drivers/w1/
Dw1_ds2484.c75 WRITE_BIT(data->reg_device_config, DEVICE_1WS_pos, value); in ds2484_configure()
78 WRITE_BIT(data->reg_device_config, DEVICE_SPU_pos, value); in ds2484_configure()
141 WRITE_BIT(data->reg_device_config, DEVICE_APU_pos, config->apu); in ds2484_init()
Dw1_ds2482-800_channel.c75 WRITE_BIT(reg_config, DEVICE_1WS_pos, value); in ds2482_configure()
78 WRITE_BIT(reg_config, DEVICE_SPU_pos, value); in ds2482_configure()
/Zephyr-latest/drivers/display/
Dssd1322.c269 WRITE_BIT(data[0], 0, config->remap_row_first); in ssd1322_init_device()
270 WRITE_BIT(data[0], 1, config->remap_columns); in ssd1322_init_device()
271 WRITE_BIT(data[0], 2, config->remap_nibble); in ssd1322_init_device()
272 WRITE_BIT(data[0], 4, config->remap_rows); in ssd1322_init_device()
273 WRITE_BIT(data[0], 5, config->remap_com_odd_even_split); in ssd1322_init_device()
274 WRITE_BIT(data[1], 4, config->remap_com_dual); in ssd1322_init_device()
/Zephyr-latest/drivers/clock_control/
Dclock_control_renesas_ra_cgc.c33 WRITE_BIT(*mstp_regs[subsys_clk->mstp], subsys_clk->stop_bit, false); in clock_control_renesas_ra_on()
45 WRITE_BIT(*mstp_regs[subsys_clk->mstp], subsys_clk->stop_bit, true); in clock_control_renesas_ra_off()
/Zephyr-latest/drivers/sensor/s11059/
Ds11059.c154 WRITE_BIT(control, S11059_CONTROL_ADC_RESET, 1); in s11059_start_measurement()
155 WRITE_BIT(control, S11059_CONTROL_STADBY, 0); in s11059_start_measurement()
163 WRITE_BIT(control, S11059_CONTROL_ADC_RESET, 0); in s11059_start_measurement()
283 WRITE_BIT(control, S11059_CONTROL_GAIN, cfg->gain); in s11059_init()
/Zephyr-latest/drivers/cache/
Dcache_andes_l2.h191 WRITE_BIT(l2c_ctrl, 0, true); in nds_l2_cache_enable()
203 WRITE_BIT(l2c_ctrl, 0, false); in nds_l2_cache_disable()
266 WRITE_BIT(l2c_ctrl, 0, true); in nds_l2_cache_init()
/Zephyr-latest/samples/subsys/usb/hid-mouse/src/
Dmain.c67 WRITE_BIT(tmp[MOUSE_BTN_REPORT_IDX], MOUSE_BTN_LEFT, evt->value); in input_cb()
71 WRITE_BIT(tmp[MOUSE_BTN_REPORT_IDX], MOUSE_BTN_RIGHT, evt->value); in input_cb()
/Zephyr-latest/lib/posix/options/
Dsignal.c51 WRITE_BIT(set->sig[SIGNO_WORD_IDX(signo)], SIGNO_WORD_BIT(signo), 1); in sigaddset()
63 WRITE_BIT(set->sig[SIGNO_WORD_IDX(signo)], SIGNO_WORD_BIT(signo), 0); in sigdelset()
/Zephyr-latest/drivers/gnss/
Dgnss_luatos_air530z.c310 WRITE_BIT(encoded_systems, 0, systems & GNSS_SYSTEM_GPS); in luatos_air530z_set_enabled_systems()
311 WRITE_BIT(encoded_systems, 1, systems & GNSS_SYSTEM_GLONASS); in luatos_air530z_set_enabled_systems()
312 WRITE_BIT(encoded_systems, 2, systems & GNSS_SYSTEM_BEIDOU); in luatos_air530z_set_enabled_systems()

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