1 /*
2 * Copyright (c) ENE Technology Inc.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #define DT_DRV_COMPAT ene_kb1200_pinctrl
8
9 #include <zephyr/devicetree.h>
10 #include <zephyr/drivers/pinctrl.h>
11 #include <zephyr/sys/util_macro.h>
12 #include <zephyr/dt-bindings/pinctrl/ene-kb1200-pinctrl.h>
13 #include <zephyr/sys/util.h>
14 #include <reg/gcfg.h>
15 #include <reg/gpio.h>
16
17 /*
18 * PINMUX_FUNC_A : GPIO Function
19 * PINMUX_FUNC_B : AltOutput 1 Function
20 * PINMUX_FUNC_C : AltOutput 2 Function
21 * PINMUX_FUNC_D : AltOutput 3 Function
22 * PINMUX_FUNC_E : AltOutput 4 Function
23 *
24 * GPIO Alternate Output Function Selection
25 * (PINMUX_FUNC_A) (PINMUX_FUNC_B) (PINMUX_FUNC_C) (PINMUX_FUNC_D) (PINMUX_FUNC_E)
26 * GPIO00 PWMLED0 PWM8
27 * GPIO01 SER_RXD1 UART_SIN SBUD_DAT
28 * GPIO03 SER_TXD1 UART_SOUT SBUD_CLK
29 * GPIO22 ESBDAT PWM9
30 * GPIO28 32KOUT SERCLK2
31 * GPIO36 UARTSOUT SERTXD2
32 * GPIO5C KSO6 P80DAT
33 * GPIO5D KSO7 P80CLK
34 * GPIO5E KSO8 SERRXD1
35 * GPIO5F KSO9 SERTXD1
36 * GPIO71 SDA8 UARTRTS
37 * GPIO38 SCL4 PWM1
38 */
39
40 /*
41 * f is function number
42 * b[7:5] = pin bank
43 * b[4:0] = pin position in bank
44 * b[11:8] = function
45 */
46
47 #define ENE_KB1200_PINMUX_PIN(p) FIELD_GET(GENMASK(4, 0), p)
48 #define ENE_KB1200_PINMUX_PORT(p) FIELD_GET(GENMASK(7, 5), p)
49 #define ENE_KB1200_PINMUX_FUNC(p) FIELD_GET(GENMASK(11, 8), p)
50 #define ENE_KB1200_PINMUX_PORT_PIN(p) FIELD_GET(GENMASK(7, 0), p)
51
52 static const uint32_t gcfg_reg_addr = DT_REG_ADDR(DT_NODELABEL(gcfg));
53 static const uint32_t gpio_reg_bases[] = {
54 DT_REG_ADDR(DT_NODELABEL(gpio0x1x)),
55 DT_REG_ADDR(DT_NODELABEL(gpio2x3x)),
56 DT_REG_ADDR(DT_NODELABEL(gpio4x5x)),
57 DT_REG_ADDR(DT_NODELABEL(gpio6x7x)),
58 };
59
kb1200_config_pin(uint32_t gpio,uint32_t conf,uint32_t func)60 static int kb1200_config_pin(uint32_t gpio, uint32_t conf, uint32_t func)
61 {
62 uint32_t port = ENE_KB1200_PINMUX_PORT(gpio);
63 uint32_t pin = (uint32_t)ENE_KB1200_PINMUX_PIN(gpio);
64 struct gpio_regs *gpio_regs = (struct gpio_regs *)gpio_reg_bases[port];
65 struct gcfg_regs *gcfg_regs = (struct gcfg_regs *)gcfg_reg_addr;
66
67 if (port >= NUM_KB1200_GPIO_PORTS) {
68 return -EINVAL;
69 }
70
71 if (func == PINMUX_FUNC_GPIO) { /* only GPIO function */
72 WRITE_BIT(gpio_regs->GPIOFS, pin, 0);
73 } else {
74 func -= 1; /*for change to GPIOALT setting value*/
75 switch (gpio) {
76 case GPIO00_PWMLED0_PWM8:
77 WRITE_BIT(gcfg_regs->GPIOALT, 0, func);
78 break;
79 case GPIO01_SERRXD1_UARTSIN:
80 gcfg_regs->GPIOMUX = (gcfg_regs->GPIOMUX & ~(3 << 9)) | (func << 9);
81 break;
82 case GPIO03_SERTXD1_UARTSOUT:
83 gcfg_regs->GPIOMUX = (gcfg_regs->GPIOMUX & ~(3 << 9)) | (func << 9);
84 break;
85 case GPIO22_ESBDAT_PWM9:
86 WRITE_BIT(gcfg_regs->GPIOALT, 1, func);
87 break;
88 case GPIO28_32KOUT_SERCLK2:
89 WRITE_BIT(gcfg_regs->GPIOALT, 2, func);
90 break;
91 case GPIO36_UARTSOUT_SERTXD2:
92 WRITE_BIT(gcfg_regs->GPIOALT, 3, func);
93 break;
94 case GPIO5C_KSO6_P80DAT:
95 WRITE_BIT(gcfg_regs->GPIOALT, 4, func);
96 break;
97 case GPIO5D_KSO7_P80CLK:
98 WRITE_BIT(gcfg_regs->GPIOALT, 5, func);
99 break;
100 case GPIO5E_KSO8_SERRXD1:
101 WRITE_BIT(gcfg_regs->GPIOALT, 6, func);
102 break;
103 case GPIO5F_KSO9_SERTXD1:
104 WRITE_BIT(gcfg_regs->GPIOALT, 7, func);
105 break;
106 case GPIO71_SDA8_UARTRTS:
107 WRITE_BIT(gcfg_regs->GPIOALT, 8, func);
108 break;
109 case GPIO38_SCL4_PWM1:
110 WRITE_BIT(gcfg_regs->GPIOALT, 9, func);
111 break;
112 }
113 WRITE_BIT(gpio_regs->GPIOFS, pin, 1);
114 }
115 /*Input always enable for loopback*/
116 WRITE_BIT(gpio_regs->GPIOIE, pin, 1);
117
118 if (conf & BIT(ENE_KB1200_NO_PUD_POS)) {
119 WRITE_BIT(gpio_regs->GPIOPU, pin, 0);
120 WRITE_BIT(gpio_regs->GPIOPD, pin, 0);
121 }
122 if (conf & BIT(ENE_KB1200_PU_POS)) {
123 WRITE_BIT(gpio_regs->GPIOPU, pin, 1);
124 }
125 if (conf & BIT(ENE_KB1200_PD_POS)) {
126 WRITE_BIT(gpio_regs->GPIOPD, pin, 1);
127 }
128
129 if (conf & BIT(ENE_KB1200_OUT_DIS_POS)) {
130 WRITE_BIT(gpio_regs->GPIOOE, pin, 0);
131 }
132 if (conf & BIT(ENE_KB1200_OUT_EN_POS)) {
133 WRITE_BIT(gpio_regs->GPIOOE, pin, 1);
134 }
135
136 if (conf & BIT(ENE_KB1200_OUT_LO_POS)) {
137 WRITE_BIT(gpio_regs->GPIOD, pin, 0);
138 }
139 if (conf & BIT(ENE_KB1200_OUT_HI_POS)) {
140 WRITE_BIT(gpio_regs->GPIOD, pin, 1);
141 }
142
143 if (conf & BIT(ENE_KB1200_PUSH_PULL_POS)) {
144 WRITE_BIT(gpio_regs->GPIOOD, pin, 0);
145 }
146 if (conf & BIT(ENE_KB1200_OPEN_DRAIN_POS)) {
147 WRITE_BIT(gpio_regs->GPIOOD, pin, 1);
148 }
149
150 if (conf & BIT(ENE_KB1200_PIN_LOW_POWER_POS)) {
151 WRITE_BIT(gpio_regs->GPIOLV, pin, 1);
152 }
153
154 return 0;
155 }
156
pinctrl_configure_pins(const pinctrl_soc_pin_t * pins,uint8_t pin_cnt,uintptr_t reg)157 int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt, uintptr_t reg)
158 {
159 uint32_t portpin, pinmux, func;
160 int ret;
161
162 ARG_UNUSED(reg);
163
164 for (uint8_t i = 0U; i < pin_cnt; i++) {
165 pinmux = pins[i];
166
167 func = ENE_KB1200_PINMUX_FUNC(pinmux);
168 if (func >= PINMUX_FUNC_MAX) {
169 return -EINVAL;
170 }
171
172 portpin = ENE_KB1200_PINMUX_PORT_PIN(pinmux);
173
174 ret = kb1200_config_pin(portpin, pinmux, func);
175 if (ret < 0) {
176 return ret;
177 }
178 }
179
180 return 0;
181 }
182
