Searched refs:sys_read32 (Results 176 – 196 of 196) sorted by relevance
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119 return sys_read32(cfg->base + offset); in mss_spi_read()
498 sys_write32((sys_read32(addr) | DT_INST_PHA(n, ambiq_pwrcfg, mask)), addr); \
114 return sys_read32(cfg->base + offset); in mss_qspi_read()
107 return sys_read32(config->base + offset); in xlnx_quadspi_read32()
27 return sys_read32(DEVICE_MMIO_GET(dev) + offset); in spi_pw_reg_read()
47 #define REG_READ(r) sys_read32(config->base + (r))
48 return sys_read32(base_address + reg); in vtd_read_reg32()
35 #define PORT_READ(p) sys_read32(config->port_base + SIUL2_MSCR(p))
163 temp = sys_read32(DT_REG_ADDR(DT_NODELABEL(rcc)) + pclken->bus); in stm32_clock_control_on()
403 temp = sys_read32(STM32H7_BUS_CLK_REG + pclken->bus);
76 #define REG_READ(r) sys_read32(p->base_addr + (r))
168 return sys_read32(PACKAGE_BASE); in ll_get_package_type()
98 return sys_read32(DEVICE_MMIO_GET(dev) + reg); in rcar_mmc_read_reg32()636 buf0 = sys_read32(buf0_addr); in rcar_mmc_read_buf0()
425 return sys_read32(port);459 return sys_read32(port);
1024 uint32_t calr = sys_read32((mem_addr_t) &RTC->CALR); in rtc_stm32_get_calibration()
1347 *val = sys_read32(base + reg); in can_mcan_sys_read_reg()
352 return sys_read32((mem_addr_t)(uintptr_t)reg); in dma_xilinx_axi_dma_read_reg()
391 val = sys_read32(config->reg_addr + RCAR_CAN_MB_60); in can_rcar_rx_isr()
924 if (sys_read32(cfg->reg_base) & MSPI_BUSY) { in mspi_ambiq_get_channel_status()
152 ({ sys_read32(((uintptr_t)utcpd_base) + reg_offset); })
1131 * :github:`31385` - ARC version of sys_read32 only reads uint16_t on Zephyr v2.4
