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Searched refs:pinmux (Results 376 – 400 of 983) sorted by relevance

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/Zephyr-latest/soc/quicklogic/eos_s3/
Dpinctrl_soc.h32 .pin = DT_PROP_BY_IDX(node_id, pinmux, 0), \
33 .iof = DT_PROP_BY_IDX(node_id, pinmux, 1), \
/Zephyr-latest/boards/ti/sk_am62/
Dsk_am62_am6234_m4.dts38 pinmux = <K3_PINMUX(0x0014, PIN_INPUT, MUX_MODE_0)>;
41 pinmux = <K3_PINMUX(0x0018, PIN_OUTPUT, MUX_MODE_0)>;
/Zephyr-latest/boards/phytec/phyboard_lyra/
Dphyboard_lyra_am6234_a53.dts44 pinmux = <K3_PINMUX(0x1c8, PIN_INPUT, MUX_MODE_0)>;
47 pinmux = <K3_PINMUX(0x1cc, PIN_OUTPUT, MUX_MODE_0)>;
/Zephyr-latest/tests/drivers/pwm/pwm_loopback/boards/
Dfrdm_ke17z.overlay10 pinmux = <FTM0_CH6_PTA17>,
19 pinmux = <PWT_IN1_PTE11>;
Dfrdm_ke17z512.overlay10 pinmux = <FTM0_CH6_PTA17>,
19 pinmux = <PWT_IN1_PTE11>;
/Zephyr-latest/samples/drivers/led/pwm/boards/
Dmec172xevb_assy6906.overlay45 pinmux = <MCHP_XEC_PINMUX(0156, MCHP_AF1)>;
49 pinmux = <MCHP_XEC_PINMUX(0157, MCHP_AF1)>;
53 pinmux = <MCHP_XEC_PINMUX(0153, MCHP_AF1)>;
57 pinmux = <MCHP_XEC_PINMUX(035, MCHP_AF4)>;
Dmec15xxevb_assy6853.overlay40 pinmux = <MCHP_XEC_PINMUX(0156, MCHP_AF1)>;
44 pinmux = <MCHP_XEC_PINMUX(0157, MCHP_AF1)>;
48 pinmux = <MCHP_XEC_PINMUX(0153, MCHP_AF1)>;
/Zephyr-latest/dts/arm/nxp/
Dnxp_k2x.dtsi196 porta: pinmux@40049000 {
197 compatible = "nxp,port-pinmux";
202 portb: pinmux@4004a000 {
203 compatible = "nxp,port-pinmux";
208 portc: pinmux@4004b000 {
209 compatible = "nxp,port-pinmux";
214 portd: pinmux@4004c000 {
215 compatible = "nxp,port-pinmux";
220 porte: pinmux@4004d000 {
221 compatible = "nxp,port-pinmux";
Dnxp_mcxa156.dtsi53 porta: pinmux@400bc000 {
54 compatible = "nxp,port-pinmux";
59 portb: pinmux@400bd000 {
60 compatible = "nxp,port-pinmux";
65 portc: pinmux@400be000 {
66 compatible = "nxp,port-pinmux";
71 portd: pinmux@400bf000 {
72 compatible = "nxp,port-pinmux";
77 porte: pinmux@400c0000 {
78 compatible = "nxp,port-pinmux";
Dnxp_imx8m_m4.dtsi220 * GPIO pinmux options. These options define the pinmux settings
226 pinmux = <&iomuxc_gpio1_io00_gpio_io_gpio1_io00>,
259 pinmux = <&iomuxc_sd1_clk_gpio_io_gpio2_io00>,
283 pinmux = <&iomuxc_nand_ale_gpio_io_gpio3_io00>,
312 pinmux = <&iomuxc_sai1_rxfs_gpio_io_gpio4_io00>,
347 pinmux = <&iomuxc_sai3_txc_gpio_io_gpio5_io00>,
Dnxp_imx8ml_m7.dtsi222 * GPIO pinmux options. These options define the pinmux settings
228 pinmux = <&iomuxc_gpio1_io00_gpio_io_gpio1_io0>,
261 pinmux = <&iomuxc_sd1_clk_gpio_io_gpio2_io0>,
285 pinmux = <&iomuxc_nand_ale_gpio_io_gpio3_io0>,
318 pinmux = <&iomuxc_sai1_rxfs_gpio_io_gpio4_io0>,
353 pinmux = <&iomuxc_sai3_txc_gpio_io_gpio5_io0>,
Dnxp_imx93_m33.dtsi106 pinmux = <&iomuxc1_i2c1_scl_gpio_io_gpio1_io00>,
125 pinmux = <&iomuxc1_gpio_io00_gpio_io_gpio2_io00>,
158 pinmux = <&iomuxc1_sd2_cd_b_gpio_io_gpio3_io00>,
193 pinmux = <&iomuxc1_enet1_mdc_gpio_io_gpio4_io00>,
Dnxp_kw40z.dtsi126 porta: pinmux@40049000 {
127 compatible = "nxp,port-pinmux";
132 portb: pinmux@4004a000 {
133 compatible = "nxp,port-pinmux";
138 portc: pinmux@4004b000 {
139 compatible = "nxp,port-pinmux";
Dnxp_k8x.dtsi262 porta: pinmux@40049000 {
263 compatible = "nxp,port-pinmux";
268 portb: pinmux@4004a000 {
269 compatible = "nxp,port-pinmux";
274 portc: pinmux@4004b000 {
275 compatible = "nxp,port-pinmux";
280 portd: pinmux@4004c000 {
281 compatible = "nxp,port-pinmux";
286 porte: pinmux@4004d000 {
287 compatible = "nxp,port-pinmux";
Dnxp_kw41z.dtsi133 porta: pinmux@40049000 {
134 compatible = "nxp,port-pinmux";
139 portb: pinmux@4004a000 {
140 compatible = "nxp,port-pinmux";
145 portc: pinmux@4004b000 {
146 compatible = "nxp,port-pinmux";
Dnxp_ke1xz.dtsi189 porta: pinmux@40049000 {
190 compatible = "nxp,port-pinmux";
195 portb: pinmux@4004a000 {
196 compatible = "nxp,port-pinmux";
201 portc: pinmux@4004b000 {
202 compatible = "nxp,port-pinmux";
207 portd: pinmux@4004c000 {
208 compatible = "nxp,port-pinmux";
213 porte: pinmux@4004d000 {
214 compatible = "nxp,port-pinmux";
Dnxp_imx7d_m4.dtsi377 * GPIO pinmux options. These options define the pinmux settings
383 pinmux = <&mx7d_pad_lpsr_gpio1_io00__gpio1_io0>,
402 pinmux = <&mx7d_pad_epdc_data00__gpio2_io0>,
437 pinmux = <&mx7d_pad_lcd_clk__gpio3_io0>,
469 pinmux = <&mx7d_pad_uart1_rx_data__gpio4_io0>,
496 pinmux = <&mx7d_pad_sd1_cd_b__gpio5_io0>,
517 pinmux = <&mx7d_pad_sd3_clk__gpio6_io0>,
543 pinmux = <&mx7d_pad_enet1_rgmii_rd0__gpio7_io0>,
/Zephyr-latest/dts/arm64/nxp/
Dnxp_mimx8mn_a53.dtsi251 * GPIO pinmux options. These options define the pinmux settings
257 pinmux = <&iomuxc_gpio1_io00_gpio_io_gpio1_io0>,
290 pinmux = <&iomuxc_sd1_clk_gpio_io_gpio2_io0>,
314 pinmux = <&iomuxc_nand_ale_gpio_io_gpio3_io0>,
343 * Use the NULL pinmux for the GPIO io port which is not available to
348 pinmux = <0x0 0 0x0 0 0x0>;
353 pinmux = <&null_pinmux>,
388 pinmux = <&iomuxc_sai3_txc_gpio_io_gpio5_io0>,
/Zephyr-latest/boards/arm/v2m_beetle/
DCMakeLists.txt4 zephyr_library_sources(pinmux.c)
/Zephyr-latest/boards/nxp/twr_ke18f/
DCMakeLists.txt5 zephyr_library_sources(pinmux.c)
/Zephyr-latest/boards/arm/v2m_musca_b1/
DCMakeLists.txt8 zephyr_library_sources(pinmux.c)
/Zephyr-latest/boards/arm/v2m_musca_s1/
DCMakeLists.txt8 zephyr_library_sources(pinmux.c)
/Zephyr-latest/samples/drivers/adc/adc_dt/boards/
Dda1469x_dk_pro.overlay11 /* adjust channel number according to pinmux in board.dts */
19 pinmux = <SMARTBOND_PINMUX(ADC, 0, 25)>,
26 pinmux = <SMARTBOND_PINMUX(ADC, 1, 14)>,
Dnucleo_wba52cg.overlay9 /* adjust channel number according to pinmux in board.dts */
/Zephyr-latest/tests/drivers/adc/adc_api/boards/
Dstm32u5a9j_dk.overlay9 /* adjust channel number according to pinmux in board.dts */

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