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/Zephyr-latest/boards/infineon/cy8cproto_062_4343w/
Dcy8cproto_062_4343w-pinctrl.dtsi46 pinmux = <DT_CAT1_PINMUX(2, 5, HSIOM_SEL_ACT_14)>;
52 pinmux = <DT_CAT1_PINMUX(2, 4, HSIOM_SEL_ACT_14)>;
58 pinmux = <DT_CAT1_PINMUX(2, 0, HSIOM_SEL_ACT_14)>;
64 pinmux = <DT_CAT1_PINMUX(2, 1, HSIOM_SEL_ACT_14)>;
70 pinmux = <DT_CAT1_PINMUX(2, 2, HSIOM_SEL_ACT_14)>;
76 pinmux = <DT_CAT1_PINMUX(2, 3, HSIOM_SEL_ACT_14)>;
/Zephyr-latest/boards/nuvoton/numaker_pfm_m467/
Dnumaker_pfm_m467-pinctrl.dtsi12 pinmux = <PB12MFP_UART0_RXD>,
20 pinmux = <PB9MFP_UART1_nCTS>,
31 pinmux = <PJ10MFP_CAN0_TXD>,
39 pinmux = <PE8MFP_EMAC0_RMII_MDC>,
56 pinmux = <PA12MFP_USB_VBUS>,
/Zephyr-latest/samples/boards/raspberrypi/rpi_pico/uart_pio/boards/
Drpi_pico.overlay4 pinmux = <PIO1_P1>;
9 pinmux = <PIO1_P0>;
15 pinmux = <PIO1_P2>;
20 pinmux = <PIO1_P3>;
/Zephyr-latest/boards/nxp/lpcxpresso55s16/
Dlpcxpresso55s16-pinctrl.dtsi15 pinmux = <CAN0_RD_PIO1_22>,
23 pinmux = <FC0_RXD_SDA_MOSI_DATA_PIO0_29>,
31 pinmux = <FC4_TXD_SCL_MISO_WS_PIO1_20>,
39 pinmux = <HS_SPI_MOSI_PIO0_26>,
/Zephyr-latest/boards/toradex/verdin_imx8mm/
Dverdin_imx8mm-pinctrl.dtsi12 pinmux = <&iomuxc_uart4_rxd_uart_rx_uart4_rx>,
21 pinmux = <&iomuxc_uart3_rxd_uart_rx_uart3_rx>,
30 pinmux = <&iomuxc_sai3_rxd_uart_cts_b_uart2_rts_b>,
41 pinmux = <&iomuxc_sai2_rxfs_uart_rx_uart1_tx>,
/Zephyr-latest/boards/nxp/frdm_mcxc444/
Dfrdm_mcxc444-pinctrl.dtsi13 pinmux = <I2C0_SCL_PTE24>,
22 pinmux = <LPUART0_RX_PTA1>,
30 pinmux = <UART2_RX_PTD2>,
38 pinmux = <TPM0_CH2_PTE29>,
/Zephyr-latest/boards/nxp/lpcxpresso55s28/
Dlpcxpresso55s28-pinctrl.dtsi15 pinmux = <FC0_RXD_SDA_MOSI_DATA_PIO0_29>,
23 pinmux = <FC4_RXD_SDA_MOSI_DATA_PIO1_21>,
31 pinmux = <HS_SPI_MOSI_PIO0_26>,
42 pinmux = <ADC0_CH0_PIO0_23>,
/Zephyr-latest/tests/drivers/mspi/api/boards/
Dapollo3p_evb.overlay39 pinmux = <GPIO_P51>,
56 pinmux = <MSPI1_0_P51>,
70 pinmux = <MSPI1_8_P59>;
77 pinmux = <NCE50_P50>;
84 pinmux = <GPIO_P69>;
/Zephyr-latest/boards/technexion/pico_pi/
Dpico_pi-pinctrl.dtsi14 pinmux = <&mx7d_pad_uart2_rx_data__uart2_dce_rx>,
26 pinmux = <&mx7d_pad_i2c4_scl__uart5_dce_rx>,
38 pinmux = <&mx7d_pad_epdc_data08__uart6_dce_rx>,
50 pinmux = <&mx7d_pad_uart1_rx_data__i2c1_scl>,
63 pinmux = <&mx7d_pad_i2c2_scl__i2c2_scl>,
76 pinmux = <&mx7d_pad_i2c3_scl__i2c3_scl>,
89 pinmux = <&mx7d_pad_sai1_rx_sync__i2c4_scl>,
/Zephyr-latest/boards/nxp/imx8ulp_evk/
Dimx8ulp_evk_mimx8ud7_adsp-pinctrl.dtsi9 pinmux = <0x298c0158 0x4 0x298c09e0 0x3 0x298c0158>;
13 pinmux = <0x298c015c 0x4 0x298c09dc 0x3 0x298c015c>;
20 pinmux = <&iomuxc1_ptf22_lpuart7_tx>, <&iomuxc1_ptf23_lpuart7_rx>;
/Zephyr-latest/samples/drivers/mspi/mspi_flash/boards/
Dapollo3p_evb.overlay85 pinmux = <GPIO_P51>,
103 pinmux = <MSPI1_0_P51>,
117 pinmux = <MSPI1_8_P59>;
124 pinmux = <NCE69_P69>;
131 pinmux = <GPIO_P50>;
139 pinmux = <MSPI1_0_P51>,
153 pinmux = <MSPI1_8_P59>;
160 pinmux = <NCE50_P50>;
167 pinmux = <GPIO_P69>;
/Zephyr-latest/dts/arm/nxp/
Dnxp_rt1064.dtsi49 * GPIO pinmux options. These options define the pinmux settings
55 pinmux = <&iomuxc_gpio_ad_b0_00_gpio1_io00>,
90 pinmux = <&iomuxc_gpio_b0_00_gpio2_io00>,
125 pinmux = <&iomuxc_gpio_sd_b1_00_gpio3_io00>,
156 pinmux = <&iomuxc_gpio_emc_00_gpio4_io00>,
191 pinmux = <&iomuxc_snvs_wakeup_gpio5_io00>,
197 pinmux = <&iomuxc_gpio_ad_b0_00_gpio6_io00>,
232 pinmux = <&iomuxc_gpio_b0_00_gpio7_io00>,
267 pinmux = <&iomuxc_gpio_sd_b1_00_gpio8_io00>,
298 pinmux = <&iomuxc_gpio_emc_00_gpio9_io00>,
Dnxp_rt1040.dtsi66 * GPIO pinmux options. These options define the pinmux settings
72 pinmux = <&iomuxc_gpio_ad_b0_04_gpio1_io04>,
96 pinmux = <&iomuxc_gpio_b0_00_gpio2_io00>,
131 pinmux = <&iomuxc_gpio_sd_b1_00_gpio3_io00>,
162 pinmux = <&iomuxc_gpio_emc_00_gpio4_io00>,
197 pinmux = <&iomuxc_snvs_wakeup_gpio5_io00>,
202 pinmux = <&iomuxc_gpio_ad_b0_04_gpio6_io04>,
226 pinmux = <&iomuxc_gpio_b0_00_gpio7_io00>,
261 pinmux = <&iomuxc_gpio_sd_b1_00_gpio8_io00>,
292 pinmux = <&iomuxc_gpio_emc_00_gpio9_io00>,
Dnxp_rt1050.dtsi58 * GPIO pinmux options. These options define the pinmux settings
64 pinmux = <&iomuxc_gpio_ad_b0_00_gpio1_io00>,
99 pinmux = <&iomuxc_gpio_b0_00_gpio2_io00>,
134 pinmux = <&iomuxc_gpio_sd_b1_00_gpio3_io00>,
165 pinmux = <&iomuxc_gpio_emc_00_gpio4_io00>,
200 pinmux = <&iomuxc_snvs_wakeup_gpio5_io00>,
Dnxp_rt118x_cm7.dtsi53 * GPIO pinmux options. These options define the pinmux settings
59 pinmux = <&iomuxc_aon_gpio_aon_00_gpio1_io00>,
90 pinmux = <&iomuxc_gpio_emc_b1_00_gpio2_io00>,
125 pinmux = <&iomuxc_gpio_emc_b1_32_gpio3_io00>,
159 pinmux = <&iomuxc_gpio_ad_00_gpio4_io00>,
194 pinmux = <&iomuxc_gpio_ad_32_gpio5_io00>,
219 pinmux = <&iomuxc_gpio_b1_00_gpio6_io00>,
/Zephyr-latest/tests/drivers/uart/uart_elementary/socs/
Desp32s3_procpu.overlay9 pinmux = <UART1_TX_GPIO2>,
15 pinmux = <UART1_RX_GPIO3>,
24 pinmux = <UART2_TX_GPIO3>,
30 pinmux = <UART2_RX_GPIO2>,
Desp32_procpu.overlay9 pinmux = <UART1_TX_GPIO2>,
15 pinmux = <UART1_RX_GPIO3>,
24 pinmux = <UART2_TX_GPIO3>,
30 pinmux = <UART2_RX_GPIO2>,
/Zephyr-latest/boards/element14/warp7/
Dwarp7-pinctrl.dtsi14 pinmux = <&mx7d_pad_uart2_rx_data__uart2_dte_tx>,
26 pinmux = <&mx7d_pad_ecspi1_sclk__uart6_dce_rx>,
38 pinmux = <&mx7d_pad_i2c1_scl__i2c1_scl>,
51 pinmux = <&mx7d_pad_i2c2_scl__i2c2_scl>,
64 pinmux = <&mx7d_pad_i2c3_scl__i2c3_scl>,
77 pinmux = <&mx7d_pad_i2c4_scl__i2c4_scl>,
/Zephyr-latest/drivers/pinctrl/
Dpinctrl_mchp_mec5.c31 static int mec5_config_pin(uint32_t pinmux, uint32_t altf) in mec5_config_pin() argument
33 uint32_t conf = pinmux; in mec5_config_pin()
39 ret = mec_hal_gpio_pin_num(MCHP_XEC_PINMUX_PORT(pinmux), MCHP_XEC_PINMUX_PIN(pinmux), &pin); in mec5_config_pin()
146 uint32_t pinmux, func; in pinctrl_configure_pins() local
152 pinmux = pins[i]; in pinctrl_configure_pins()
154 func = MCHP_XEC_PINMUX_FUNC(pinmux); in pinctrl_configure_pins()
159 ret = mec5_config_pin(pinmux, func); in pinctrl_configure_pins()
/Zephyr-latest/soc/nxp/imx/imx8x/adsp/
Dpinctrl_soc.h26 .pad = DT_PROP_BY_IDX(n, pinmux, 0), \
27 .mux = DT_PROP_BY_IDX(n, pinmux, 1), \
35 DT_FOREACH_PROP_ELEM, pinmux, Z_PINCTRL_PINMUX) };
/Zephyr-latest/soc/nxp/imx/imx8/adsp/
Dpinctrl_soc.h26 .pad = DT_PROP_BY_IDX(n, pinmux, 0), \
27 .mux = DT_PROP_BY_IDX(n, pinmux, 1), \
35 DT_FOREACH_PROP_ELEM, pinmux, Z_PINCTRL_PINMUX) };
/Zephyr-latest/boards/gd/gd32f403z_eval/
Dgd32f403z_eval-pinctrl.dtsi11 pinmux = <USART0_TX_PA9_NORMP>, <USART0_RX_PA10_NORMP>;
17 pinmux = <ADC012_IN13_PC3>;
23 pinmux = <TIMER0_CH0_PA8_OUT_NORMP>;
/Zephyr-latest/soc/renesas/rz/common/
Dpinctrl_rzg.h45 COND_CODE_1(DT_NODE_HAS_PROP(node_id, pinmux), \
46 (DT_FOREACH_PROP_ELEM(node_id, pinmux, Z_PINCTRL_PINMUX_INIT)), \
52 #define RZG_GET_PORT_PIN(pinmux) (pinmux & ~(0xF << 4)) argument
53 #define RZG_GET_FUNC(pinmux) ((pinmux & 0xF0) >> 4) argument
/Zephyr-latest/samples/drivers/memc/boards/
Drd_rw612_bga.overlay18 pinmux_flexspi_safe: pinmux-flexspi-safe {
20 pinmux = <IO_MUX_QUAD_SPI_PSRAM_IO35
30 pinmux = <IO_MUX_QUAD_SPI_PSRAM_IO37>;
/Zephyr-latest/boards/phytec/phyboard_pollux/
Dphyboard_pollux-pinctrl.dtsi12 pinmux = <&iomuxc_uart1_rxd_uart_rx_uart1_rx>,
21 pinmux = <&iomuxc_uart3_txd_uart_tx_uart3_tx>,
32 pinmux = <&iomuxc_uart4_rxd_uart_rx_uart4_rx>,

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