1/*
2 * Copyright 2023 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/ {
8	aliases {
9		sram-ext = &is66wvq8m4;
10	};
11};
12
13&is66wvq8m4 {
14	status = "okay";
15};
16
17&pinctrl {
18	pinmux_flexspi_safe: pinmux-flexspi-safe {
19		group0 {
20			pinmux = <IO_MUX_QUAD_SPI_PSRAM_IO35
21				IO_MUX_QUAD_SPI_PSRAM_IO36
22				IO_MUX_QUAD_SPI_PSRAM_IO38
23				IO_MUX_QUAD_SPI_PSRAM_IO39
24				IO_MUX_QUAD_SPI_PSRAM_IO40
25				IO_MUX_QUAD_SPI_PSRAM_IO41>;
26			slew-rate = "normal";
27		};
28
29		group1 {
30			pinmux = <IO_MUX_QUAD_SPI_PSRAM_IO37>;
31			slew-rate = "normal";
32			bias-pull-down;
33		};
34	};
35};
36
37/* Override pin control state to use one that only changes the PSRAM pin
38 * configuration
39 */
40&flexspi {
41	pinctrl-0 = <&pinmux_flexspi_safe>;
42};
43