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/Zephyr-latest/dts/arm/st/h7rs/
Dstm32h7rs.dtsi16 #include <zephyr/dt-bindings/memory-attr/memory-attr.h>
17 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
49 sram0: memory@24000000 {
55 sram1: memory@30000000 {
57 compatible = "zephyr,memory-region", "mmio-sram";
58 zephyr,memory-region = "SRAM1";
62 sram2: memory@30004000 {
63 compatible = "zephyr,memory-region", "mmio-sram";
65 zephyr,memory-region = "SRAM2";
68 dtcm: memory@20000000 {
[all …]
/Zephyr-latest/dts/xtensa/nxp/
Dnxp_imx8m.dtsi33 sram0: memory@92400000 {
34 device_type = "memory";
39 sram1: memory@92c00000 {
40 device_type = "memory";
/Zephyr-latest/tests/kernel/mem_slab/mslab/
DREADME.txt5 This test verifies that the kernel memory slab APIs operate as expected.
33 starting test - Test Kernel memory slabs
77 helper_thread: About to free a memory block
83 helper_thread: About to free another memory block
/Zephyr-latest/tests/subsys/ipc/ipc_sessions/interoperability/
DKconfig.icmsg_v15 bool "Synchronize access to shared memory"
9 Provide synchronization access to shared memory at a library level.
11 multiple contexts. Mutex is used to guard access to the memory.
80 with read/write semantics on top of a memory region shared by the
81 reader and writer. It optionally embeds cache and memory barrier
/Zephyr-latest/dts/arm/nuvoton/
Dnpcx7m7fc.dtsi23 sram0: memory@200b0000 {
29 bootloader_ram: memory@200cf800 {
Dnpcx9mfp.dtsi23 sram0: memory@200c0000 {
29 bootloader_ram: memory@200d7000 {
/Zephyr-latest/tests/boards/nrf/i2c/i2c_slave/boards/
Dnrf54h20dk_nrf54h20_cpuapp.overlay49 memory-regions = <&cpuapp_dma_region>;
62 memory-regions = <&cpuapp_dma_region>;
/Zephyr-latest/boards/nxp/lpcxpresso55s69/
Dboard.cmake18 board_runner_args(linkserver "--override=/device/memory/0/flash-driver=LPC55xx_S.cfx")
19 board_runner_args(linkserver "--override=/device/memory/0/location=0x10000000")
/Zephyr-latest/dts/arm/ambiq/
Dambiq_apollo3p_blue.dtsi65 compatible = "zephyr,memory-region";
67 zephyr,memory-region = "ITCM";
71 sram0: memory@10010000 {
76 xip0: memory@52000000 {
77 compatible = "zephyr,memory-region";
79 zephyr,memory-region = "XIP0";
82 xip1: memory@54000000 {
83 compatible = "zephyr,memory-region";
85 zephyr,memory-region = "XIP1";
88 xip2: memory@56000000 {
[all …]
/Zephyr-latest/doc/hardware/arch/
Darm-scmi.rst107 Shared memory and doorbell-based transport
110 This form of transport uses shared memory for reading/writing messages
112 memory area is performed using a driver (:file:`drivers/firmware/scmi/shmem.c`),
116 Interacting with the shared memory area and signaling are abstracted by the
117 transport API, which is implemented by the shared memory and doorbell-based
123 #. Write message to the shared memory area.
125 …#. Platform reads message from shared memory area, processes it, writes the reply back to the same…
126 #. Zephyr reads reply from the shared memory area.
129 memory area and one or more mailbox channels. This is because users may need/want
204 scmi_res0: memory@cafebabe {
[all …]
/Zephyr-latest/dts/arm/nxp/
Dnxp_lpc55S6x_common.dtsi14 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
63 sramx: memory@4000000 {
76 sram0: memory@20000000 {
81 sram1: memory@20010000 {
86 sram2: memory@20020000 {
91 sram3: memory@20030000 {
96 sram4: memory@20040000 {
106 usb_sram: memory@100000 {
107 compatible = "zephyr,memory-region", "mmio-sram";
109 zephyr,memory-region = "USB_SRAM";
[all …]
/Zephyr-latest/boards/intel/socfpga_std/cyclonev_socdk/
Dcyclonev_socdk.dts16 ddr0: memory@0 {
17 name = "memory";
18 device_type = "memory";
/Zephyr-latest/arch/x86/
DKconfig193 A lot of x86 that resemble PCs have many reserved physical memory
195 beginning of RAM to load the kernel in physical memory, avoiding these
199 bootstrap code within the first 64K of physical memory.
241 Selects the use of the memory-mapped PCI Express Extended
258 bool "Use memory map"
261 Enable the use of memory map to identify regions of memory.
263 The memory map can be populated via Multiboot
268 int "Number of memory map entries"
274 Maximum number of memory regions to hold in the memory map.
297 bool "Use multiboot memory map if provided"
[all …]
/Zephyr-latest/tests/drivers/uart/uart_async_api/boards/
Dnrf54h20dk_nrf54h20_cpurad.overlay6 memory-regions = <&cpurad_dma_region>;
/Zephyr-latest/arch/xtensa/
DKconfig62 A design trick on multi-core hardware is to map memory twice
211 memory domains in the target, considering the kernel itself requires one.
218 Each table can address up to 4MB memory address.
221 bool "Map memory in cached and uncached region"
223 This option specifies that the memory is mapped in two
230 memory domain when swapping page tables.
263 Default memory type for memory regions: non-cacheable memory,
266 If userspace is enabled, it will be used to restore the memory type of
267 the region being removed from a memory domain.
/Zephyr-latest/boards/renesas/ek_ra8d1/
Dek_ra8d1.dts11 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
12 #include <zephyr/dt-bindings/memory-controller/renesas,ra-sdram.h>
61 compatible = "zephyr,memory-region", "mmio-sram";
62 device_type = "memory";
64 zephyr,memory-region = "SDRAM";
/Zephyr-latest/dts/riscv/espressif/esp32c2/
Desp32c2_common.dtsi59 sram0: memory@4037c000 {
60 compatible = "zephyr,memory-region", "mmio-sram";
62 zephyr,memory-region = "SRAM0";
65 sram1: memory@3fca0000 {
66 compatible = "zephyr,memory-region", "mmio-sram";
68 zephyr,memory-region = "SRAM1";
/Zephyr-latest/subsys/emul/espi/
DKconfig17 int "Host I/O peripheral port size for shared memory in emulator"
22 over the shared memory region which returns the ACPI response data.
/Zephyr-latest/boards/nxp/mimxrt1180_evk/
Dmimxrt1180_evk_mimxrt1189_cm7.dts28 hyperram0: memory@04000000 {
30 device_type = "memory";
/Zephyr-latest/tests/boot/mcuboot_recovery_retention/boards/
Dnrf52840dk_nrf52840_mem.overlay5 compatible = "zephyr,memory-region", "mmio-sram";
7 zephyr,memory-region = "RetainedMem";
/Zephyr-latest/samples/drivers/i2c/rtio_loopback/boards/
Dnrf54h20dk_nrf54h20_cpuapp.overlay59 memory-regions = <&cpuapp_dma_region>;
69 memory-regions = <&cpuapp_dma_region>;
/Zephyr-latest/dts/arm/st/f4/
Dstm32f446.dtsi9 #include <zephyr/dt-bindings/memory-controller/stm32-fmc-sdram.h>
101 backup_sram: memory@40024000 {
102 compatible = "zephyr,memory-region", "st,stm32-backup-sram";
105 zephyr,memory-region = "BACKUP_SRAM";
151 fmc: memory-controller@a0000000 {
/Zephyr-latest/boards/infineon/xmc45_relax_kit/
Dxmc45_relax_kit.dts63 compatible = "zephyr,memory-region", "mmio-sram";
64 zephyr,memory-region = "PSRAM1";
68 compatible = "zephyr,memory-region", "mmio-sram";
69 zephyr,memory-region = "DSRAM2";
/Zephyr-latest/samples/subsys/fs/fs_sample/boards/
Dnrf52840dk_nrf52840_ram_disk_region.overlay24 sram0: memory@20000000 {
32 ram_disk: memory@20030000 {
50 /* Here is the reference to the memory reserved for our
/Zephyr-latest/tests/drivers/spi/spi_loopback/boards/
Dnrf54h20dk_nrf54h20_cpurad.overlay9 memory-regions = <&cpurad_dma_region>;

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