/Zephyr-latest/drivers/espi/ |
D | Kconfig.it8xxx2 | 131 # Port 80 and 81 I/O cycles share the same interrupt source and there is no
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/Zephyr-latest/drivers/ethernet/ |
D | Kconfig.nxp_s32_netc | 82 RX interrupt coalescing timer threshold, in units of NETC clock cycles.
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/Zephyr-latest/doc/services/portability/posix/implementation/ |
D | index.rst | 39 the other library or subsystem. This reduces the likelihood of dependency cycles in code. When
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/Zephyr-latest/drivers/pwm/ |
D | pwm_renesas_ra.c | 191 uint64_t *cycles) in pwm_renesas_ra_get_cycles_per_sec() argument 206 *cycles = (uint64_t)info.clock_frequency; in pwm_renesas_ra_get_cycles_per_sec()
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D | pwm_renesas_rz_gpt.c | 169 uint64_t *cycles) in pwm_rz_gpt_get_cycles_per_sec() argument 185 *cycles = (uint64_t)info.clock_frequency; in pwm_rz_gpt_get_cycles_per_sec()
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D | pwm_stm32.c | 760 uint32_t channel, uint64_t *cycles) in pwm_stm32_get_cycles_per_sec() argument 765 *cycles = (uint64_t)(data->tim_clk / (cfg->prescaler + 1)); in pwm_stm32_get_cycles_per_sec()
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D | pwm_nxp_s32_emios.c | 567 uint32_t channel, uint64_t *cycles) in pwm_nxp_s32_get_cycles_per_sec() argument 580 *cycles = data->emios_clk / (internal_prescaler + 1); in pwm_nxp_s32_get_cycles_per_sec() 584 *cycles = data->emios_clk / ((internal_prescaler + 1) * (global_prescaler + 1)); in pwm_nxp_s32_get_cycles_per_sec()
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/Zephyr-latest/drivers/dma/ |
D | Kconfig.xilinx_axi_dma | 100 CONFIG_DMA_XILINX_AXI_DMA_INTERRUPT_TIMEOUT * 125 * DMA_CLOCK_PERIOD cycles.
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/Zephyr-latest/boards/nxp/mr_canhubk3/ |
D | mr_canhubk3.dts | 499 * default period is 1000 cycles <-> 20ms. 565 * default period is 1000 cycles <-> 20ms.
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/Zephyr-latest/doc/releases/ |
D | index.rst | 29 for at least two cycles, meaning that the project supports the most recent two
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D | migration-guide-4.0.rst | 246 the driver dynamically configures the division ratio by specified cycles.
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D | release-notes-1.11.rst | 465 * :github:`6164` - timer: cortex_m: Incorrect read of clock cycles counter after idle tickless peri…
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/Zephyr-latest/tests/subsys/rtio/rtio_api/src/ |
D | test_rtio_api.c | 677 uint64_t cycles = timing_cycles_get(&start_time, &end_time); in _test_rtio_throughput() local 678 uint64_t ns = timing_cycles_to_ns(cycles); in _test_rtio_throughput()
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/Zephyr-latest/boards/cdns/xt-sim/doc/ |
D | index.rst | 143 a. Set ``Hardware clock cycles per second`` to appropriate value
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/Zephyr-latest/dts/riscv/ |
D | riscv32-litex-vexriscv.dtsi | 157 "cycles",
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/Zephyr-latest/subsys/debug/ |
D | Kconfig | 284 int "Spin lock holding time limit in cycles" 289 Assert at the time of unlocking the number of system clock cycles
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/Zephyr-latest/boards/st/nucleo_wba52cg/doc/ |
D | nucleo_wba52cg.rst | 92 - 1 MB flash memory with ECC, including 256 Kbytes with 100 cycles
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/Zephyr-latest/boards/st/nucleo_wba55cg/doc/ |
D | nucleo_wba55cg.rst | 90 - 1 MB flash memory with ECC, including 256 Kbytes with 100 cycles
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/Zephyr-latest/doc/kernel/services/timing/ |
D | clocks.rst | 124 numbers of nanoseconds, microseconds, ticks and cycles, respectively. 136 cycles and ticks variants of this API.
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/Zephyr-latest/dts/arm/st/g0/ |
D | stm32g0.dtsi | 418 * cycles, the sampling in a single ADC conversion or in
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/Zephyr-latest/doc/develop/test/ |
D | twister.rst | 903 For example, to extract three data fields ``metric``, ``cycles``, 910 - "(?P<metric>.*):(?P<cycles>.*) cycles, (?P<nanoseconds>.*) ns" 1004 - command: "kernel cycles" 1005 expected: "cycles: .* hw cycles"
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/Zephyr-latest/kernel/ |
D | Kconfig | 524 - Thread total execution cycles 525 - System total execution cycles 815 of cycles per tick should be chosen so that 1 millisecond is exactly 874 is assuming 1 GHz CPU and 2 cycles per loop. Reality is certainly
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/Zephyr-latest/doc/kernel/memory_management/ |
D | heap.rst | 91 complete within 1-200 cycles. One complexity is that the search of
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/Zephyr-latest/boards/native/doc/ |
D | arch_soc.rst | 131 /* Wait for a number of CPU cycles */
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/Zephyr-latest/doc/kernel/services/threads/ |
D | index.rst | 538 execution cycles of a thread.
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