Searched full:masters (Results 1 – 20 of 20) sorted by relevance
... xml visio/masters/masters.xml visio/masters/master2.xml visio/pages/page3. ...
44 * access to masters only if they are in TEE mode. Since all masters in hardware_init()46 * will deny the access to all masters except HP CPU. in hardware_init()
4 # Common fields for 1-Wire masters
4 # Common Properties for the DS2477 and DS2485 I2C 1-Wire masters:
8 core, a bus master, or set of cores and bus masters.
91 ahb-buffers-masters:94 Masters ID's for the AHB receive buffers. The master ID of every incoming105 ahb-buffers-all-masters:
27 Defaults to access enabled for all masters (hardware reset value).
23 * 64-bit master before 32-bit masters can read or write to them. Note that SRAM retains
110 .masters = DT_INST_PROP(n, ahb_buffers_masters), \159 "ahb-buffers-masters must be of size QSPI_IP_AHB_BUFFERS"); \
169 * Non-masters wait for master core (core 0) to boot enough
85 * Allow peripherals connected to external masters to wake the PLL but not
125 * Write protect b[7:0] = masters[7:0] allow write/erase. 1=allowed126 * Read protetc b[7:0] = masters[7:0] allow read. 1=allowed129 * address range and read-write-erase for all masters.
131 * Write protect b[7:0] = masters[7:0] allow write/erase. 1=allowed132 * Read protetc b[7:0] = masters[7:0] allow read. 1=allowed135 * address range and read-write-erase for all masters.
333 ahb-buffers-masters = <0 1 2 3>;335 ahb-buffers-all-masters;
27 When dealing with memory shared between a processor core and other bus masters,
8 * @brief Common functions for Analog Devices DS2477,DS2485 1-Wire Masters
64 * Allow peripherals connected to external masters to wake the PLL but not
97 * associated with the other masters. These protections in region_init()
343 * Transaction collision, several masters are trying to access in pch_check_status()
214 * Introduced the :ref:`W1 api<w1_api>`, used to interact with 1-Wire masters.
