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Searched +full:fifo +full:- +full:read +full:- +full:threshold (Results 1 – 25 of 42) sorted by relevance

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/Zephyr-latest/dts/bindings/usb/
Drenesas,smartbond-usbd.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "renesas,smartbond-usbd"
8 include: usb-ep.yaml
11 dma-min-transfer-size:
16 ep-out-buf-size:
20 Buffer size for OUT end points 0-3.
22 fifo-read-threshold:
25 RX FIFO is 64 bytes. When endpoint size is greater then 64,
26 FIFO warning interrupt is enabled to allow read incoming data
29 but it may be more efficient for MCU to read as much data as
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/Zephyr-latest/drivers/entropy/
Dentropy_smartbond.c4 * SPDX-License-Identifier: Apache-2.0
30 uint8_t threshold; member
37 (CONFIG_ENTROPY_SMARTBOND_ISR_POOL_SIZE - 1)) == 0,
41 (CONFIG_ENTROPY_SMARTBOND_THR_POOL_SIZE - 1)) == 0,
54 /* TRNG FIFO definitions are not in DA1469x.h */
86 CRG_TOP->CLK_AMBA_REG |= CRG_TOP_CLK_AMBA_REG_TRNG_CLK_ENABLE_Msk; in trng_enable()
87 TRNG->TRNG_CTRL_REG = TRNG_TRNG_CTRL_REG_TRNG_ENABLE_Msk; in trng_enable()
95 CRG_TOP->CLK_AMBA_REG &= ~CRG_TOP_CLK_AMBA_REG_TRNG_CLK_ENABLE_Msk; in trng_enable()
96 TRNG->TRNG_CTRL_REG = 0; in trng_enable()
106 return TRNG->TRNG_FIFOLVL_REG & FIFO_COUNT_MASK; in trng_available()
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Dentropy_stm32.c7 * SPDX-License-Identifier: Apache-2.0
44 * - simple rng without hardware fifo and no DMA.
45 * - Variable delay between two consecutive random numbers
54 * bytes goes below THRESHOLD, at which point it will generate entropy
67 uint8_t threshold; member
74 (CONFIG_ENTROPY_STM32_ISR_POOL_SIZE - 1)) == 0,
78 (CONFIG_ENTROPY_STM32_THR_POOL_SIZE - 1)) == 0,
110 struct entropy_stm32_rng_dev_data *dev_data = dev->data; in entropy_stm32_suspend()
111 const struct entropy_stm32_rng_dev_cfg *dev_cfg = dev->config; in entropy_stm32_suspend()
112 RNG_TypeDef *rng = dev_data->rng; in entropy_stm32_suspend()
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/Zephyr-latest/drivers/sensor/tdk/icm42688/
Dicm42688_rtio_stream.c4 * SPDX-License-Identifier: Apache-2.0
18 const struct sensor_read_config *cfg = iodev_sqe->sqe.iodev->data; in icm42688_submit_stream()
19 struct icm42688_dev_data *data = sensor->data; in icm42688_submit_stream()
20 struct icm42688_cfg new_config = data->cfg; in icm42688_submit_stream()
25 for (int i = 0; i < cfg->count; ++i) { in icm42688_submit_stream()
26 switch (cfg->triggers[i].trigger) { in icm42688_submit_stream()
37 LOG_DBG("Trigger (%d) not supported", cfg->triggers[i].trigger); in icm42688_submit_stream()
38 rtio_iodev_sqe_err(iodev_sqe, -ENOTSUP); in icm42688_submit_stream()
43 if (new_config.interrupt1_drdy != data->cfg.interrupt1_drdy || in icm42688_submit_stream()
44 new_config.interrupt1_fifo_ths != data->cfg.interrupt1_fifo_ths || in icm42688_submit_stream()
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/Zephyr-latest/drivers/sensor/st/lsm6dsv16x/
Dlsm6dsv16x_rtio_stream.c1 /* ST Microelectronics LSM6DSV16X 6-axis IMU sensor driver
6 * SPDX-License-Identifier: Apache-2.0
11 #include <zephyr/dt-bindings/sensor/lsm6dsv16x.h>
25 struct lsm6dsv16x_data *lsm6dsv16x = dev->data; in lsm6dsv16x_config_fifo()
26 const struct lsm6dsv16x_config *config = dev->config; in lsm6dsv16x_config_fifo()
27 stmdev_ctx_t *ctx = (stmdev_ctx_t *)&config->ctx; in lsm6dsv16x_config_fifo()
37 /* disable FIFO as first thing */ in lsm6dsv16x_config_fifo()
47 xl_batch = config->accel_batch; in lsm6dsv16x_config_fifo()
48 gy_batch = config->gyro_batch; in lsm6dsv16x_config_fifo()
49 temp_batch = config->temp_batch; in lsm6dsv16x_config_fifo()
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/Zephyr-latest/drivers/i2c/
Di2c_bcm_iproc.c5 * SPDX-License-Identifier: Apache-2.0
20 #include "i2c-priv.h"
123 #define M_RX_FIFO_MAX_THLD_VALUE (TX_RX_FIFO_SIZE - 1)
140 * max target read per interrupt is set to 10 bytes.
151 #define DEV_CFG(dev) ((struct iproc_i2c_config *)(dev)->config)
152 #define DEV_DATA(dev) ((struct iproc_i2c_data *)(dev)->data)
153 #define DEV_BASE(dev) ((DEV_CFG(dev))->base)
215 return -EINVAL; in iproc_i2c_target_set_address()
231 struct i2c_target_config *target_config = dd->target_cfg; in iproc_i2c_target_init()
250 ret = iproc_i2c_target_set_address(dev, target_config->address); in iproc_i2c_target_init()
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Di2c_npcx_controller.c4 * SPDX-License-Identifier: Apache-2.0
15 * support for a two-wire SMBus/I2C synchronous serial interface. The following
21 * +<----------------+<----------------------+
23 * +------+ +------------+ | +------- ----+ | +------- -------+ |
24 * +->| IDLE |-->| WAIT_START |--->| WRITE_FIFO |-+--->| WRITE_SUSPEND |--+
25 * | +------+ +------------+ +------------+ Yes +---------------+ |
27 * | +-----------+ |
28 * +--------------------------------------------| WAIT_STOP |<------------+
29 * STOP is completed +-----------+ Issue STOP
35 * +<-----------------+<---------------------+
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Di2c_xilinx_axi.c1 /* SPDX-License-Identifier: Apache-2.0 */
17 #include "i2c-priv.h"
23 /* Whether device has working dynamic read (broken prior to core rev. 2.1) */
45 sys_write32(SOFTR_KEY, config->base + REG_SOFTR); in i2c_xilinx_axi_reinit()
46 sys_write32(CR_TX_FIFO_RST, config->base + REG_CR); in i2c_xilinx_axi_reinit()
47 sys_write32(CR_EN, config->base + REG_CR); in i2c_xilinx_axi_reinit()
48 sys_write32(GIE_ENABLE, config->base + REG_GIE); in i2c_xilinx_axi_reinit()
62 sys_write32(ISR_ADDR_TARGET, config->base + REG_IER); in i2c_xilinx_axi_target_setup()
63 sys_write32(cfg->address << 1, config->base + REG_ADR); in i2c_xilinx_axi_target_setup()
64 sys_write32(0, config->base + REG_RX_FIFO_PIRQ); in i2c_xilinx_axi_target_setup()
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Di2c_dw.c1 /* dw_i2c.c - I2C file for Design Ware */
5 * Copyright (c) 2022 Andrei-Edward Popa
7 * SPDX-License-Identifier: Apache-2.0
49 #include "i2c-priv.h"
76 const struct i2c_dw_rom_config *const rom = dev->config; in cb_i2c_idma_transfer()
77 struct i2c_dw_dev_config *const dw = dev->data; in cb_i2c_idma_transfer()
79 dma_stop(rom->dma_dev, channel); in cb_i2c_idma_transfer()
83 dw->xfr_status = true; in cb_i2c_idma_transfer()
85 dw->xfr_status = false; in cb_i2c_idma_transfer()
94 write_rdlr(fifo_depth - 1, reg_base); in i2c_dw_set_fifo_th()
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/Zephyr-latest/dts/bindings/ethernet/
Dsnps,dwcxgmac.yaml2 # SPDX - License - Identifier : Apache - 2.0
9 - name: reset-device.yaml
10 - name: ethernet-controller.yaml
17 max-frame-size:
23 means that normally xgmac will reject any frame above max-frame-size
27 max-speed:
30 - 10
31 - 100
32 - 1000
33 - 2500
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/Zephyr-latest/drivers/sensor/adi/adxl372/
Dadxl372.c4 * SPDX-License-Identifier: Apache-2.0
24 * Set the threshold for activity detection for a single axis
25 * @param dev - The device structure.
26 * @param axis_reg_h - The high part of the activity register.
27 * @param act - The activity config structure.
36 struct adxl372_data *data = dev->data; in adxl372_set_activity_threshold()
38 ret = data->hw_tf->write_reg(dev, axis_reg_h++, act->thresh >> 3); in adxl372_set_activity_threshold()
47 val = (act->thresh << 5) | (act->referenced << 1) | act->enable; in adxl372_set_activity_threshold()
50 val = (act->thresh << 5) | act->enable; in adxl372_set_activity_threshold()
53 return data->hw_tf->write_reg(dev, axis_reg_h, val); in adxl372_set_activity_threshold()
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/Zephyr-latest/soc/intel/intel_adsp/cavs/include/cavs25/
Ddmic_regs.h1 /* SPDX-License-Identifier: Apache-2.0 */
65 /* Common FIFO channels register (primary & secondary) (0000 - 0FFF)
72 /* Status Register for FIFO interface */
75 /* Data read/Write port for FIFO */
79 * (crossed out) 0010h LOCAL_TSC0 64-bit Wall Clock timestamp
80 * (crossed out) 0018h LOCAL_SAMPLE0 64-bit Sample Count
81 * 001Ch - 00FFh Reserved space for extensions
151 /* Threshold Interrupt Enable */
157 /* FIFO Initialize (FINIT): The software will set this bit to immediately clear FIFO pointers. */
163 /* Burst FIFO Threshold */
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/Zephyr-latest/soc/intel/intel_adsp/ace/include/
Ddmic_regs.h1 /* SPDX-License-Identifier: Apache-2.0 */
42 /* Capture Link Select - select which link wall clock to time stamp. */
68 /* Common FIFO channels register (primary & secondary) (0000 - 0FFF)
75 /* Status Register for FIFO interface */
78 /* Data read/Write port for FIFO */
82 * (crossed out) 0010h LOCAL_TSC0 64-bit Wall Clock timestamp
83 * (crossed out) 0018h LOCAL_SAMPLE0 64-bit Sample Count
84 * 001Ch - 00FFh Reserved space for extensions
154 /* Threshold Interrupt Enable */
160 /* FIFO Initialize (FINIT): The software will set this bit to immediately clear FIFO pointers. */
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/Zephyr-latest/drivers/sensor/adi/adxl367/
Dadxl367.c4 * SPDX-License-Identifier: Apache-2.0
29 * @param dev - The device structure.
30 * @param th - Structure holding the activity threshold information:
33 * Set Threshold value
39 struct adxl367_data *data = dev->data; in adxl367_setup_activity_detection()
43 ret = data->hw_tf->write_reg_mask(dev, ADXL367_ACT_INACT_CTL, in adxl367_setup_activity_detection()
46 FIELD_PREP(ADXL367_ACT_INACT_CTL_ACT_EN_MSK, th->enable) | in adxl367_setup_activity_detection()
48 th->referenced)); in adxl367_setup_activity_detection()
53 ret = data->hw_tf->write_reg_mask(dev, ADXL367_THRESH_ACT_H, ADXL367_THRESH_H_MSK, in adxl367_setup_activity_detection()
54 FIELD_PREP(ADXL367_THRESH_H_MSK, th->value >> 6)); in adxl367_setup_activity_detection()
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/Zephyr-latest/drivers/ethernet/
Deth_smsc911x.c2 * Copyright (c) 2017-2018 ARM Limited
5 * SPDX-License-Identifier: Apache-2.0
61 SMSC9220->MAC_CSR_CMD = cmd; in smsc_mac_regread()
63 while ((SMSC9220->MAC_CSR_CMD & MAC_CSR_CMD_BUSY) != 0) { in smsc_mac_regread()
66 *val = SMSC9220->MAC_CSR_DATA; in smsc_mac_regread()
75 SMSC9220->MAC_CSR_DATA = val; in smsc_mac_regwrite()
77 SMSC9220->MAC_CSR_CMD = cmd; in smsc_mac_regwrite()
79 while ((SMSC9220->MAC_CSR_CMD & MAC_CSR_CMD_BUSY) != 0) { in smsc_mac_regwrite()
92 return -1; in smsc_phy_regread()
97 return -EBUSY; in smsc_phy_regread()
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/Zephyr-latest/drivers/i3c/
Di3c_cdns.c4 * SPDX-License-Identifier: Apache-2.0
472 /* Target T_LOW period in open-drain mode. */
482 /* command response fifo threshold */
484 /* command tx fifo threshold - unused */
486 /* in-band-interrupt data fifo threshold - unused */
488 /* in-band-interrupt response queue threshold */
490 /* tx data threshold - unused */
508 /* The maximum RX FIFO depth. */
510 /* The maximum TX FIFO depth. */
512 /* The maximum DDR RX FIFO depth. */
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/Zephyr-latest/drivers/sensor/tdk/icm42670/
Dicm42670_apex.c4 * SPDX-License-Identifier: Apache-2.0
16 /* Disabling FIFO to avoid extra power consumption due to ALP config */ in icm42670_apex_enable()
39 * configure the WoM to wake-up the DMP once it goes in power save mode in icm42670_apex_enable()
52 struct icm42670_data *data = dev->data; in icm42670_apex_fetch_from_dmp()
56 /* Read APEX interrupt status */ in icm42670_apex_fetch_from_dmp()
57 rc |= inv_imu_read_reg(&data->driver, INT_STATUS2, 1, &int_status2); in icm42670_apex_fetch_from_dmp()
58 rc |= inv_imu_read_reg(&data->driver, INT_STATUS3, 1, &int_status3); in icm42670_apex_fetch_from_dmp()
69 rc |= inv_imu_apex_get_data_activity(&data->driver, &apex_pedometer); in icm42670_apex_fetch_from_dmp()
71 if (data->pedometer_cnt != in icm42670_apex_fetch_from_dmp()
73 data->pedometer_cnt = in icm42670_apex_fetch_from_dmp()
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/Zephyr-latest/drivers/serial/
Duart_sifive.c2 * Copyright (c) 2017 Jean-Paul Etienne <fractalclone@gmail.com>
4 * SPDX-License-Identifier: Apache-2.0
20 #define RXDATA_EMPTY (1 << 31) /* Receive FIFO Empty */
23 #define TXDATA_FULL (1 << 31) /* Transmit FIFO Full */
33 * RX/TX Threshold count to generate TX/RX Interrupts.
73 ((const struct uart_sifive_device_config * const)(dev)->config)->port)
88 /* Wait while TX FIFO is full */ in uart_sifive_poll_out()
89 while (uart->tx & TXDATA_FULL) { in uart_sifive_poll_out()
92 uart->tx = (int)c; in uart_sifive_poll_out()
101 * @return 0 if a character arrived, -1 if the input buffer if empty.
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/Zephyr-latest/drivers/spi/
Dspi_ambiq_spid.c4 * SPDX-License-Identifier: Apache-2.0
57 #define AMBIQ_SPID_FIFO_LENGTH (AMBIQ_SPID_FIFO_END - AMBIQ_SPID_FIFO_BASE)
67 struct spi_ambiq_data *data = dev->data; in spi_ambiq_reset()
68 struct spi_context *ctx = &data->ctx; in spi_ambiq_reset()
71 am_hal_ios_disable(data->ios_handler); in spi_ambiq_reset()
73 ctx->config = NULL; in spi_ambiq_reset()
75 spi_context_complete(ctx, dev, -ETIMEDOUT); in spi_ambiq_reset()
80 const struct spi_ambiq_config *cfg = dev->config; in spi_ambiq_inform()
82 gpio_pin_set_dt(&cfg->int_gpios, 1); in spi_ambiq_inform()
83 gpio_pin_set_dt(&cfg->int_gpios, 0); in spi_ambiq_inform()
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Dspi_numaker.c2 * SPDX-License-Identifier: Apache-2.0
42 * CPOL/CPHA = 0/0 --> SPI_MODE_0
43 * CPOL/CPHA = 0/1 --> SPI_MODE_1
44 * CPOL/CPHA = 1/0 --> SPI_MODE_2
45 * CPOL/CPHA = 1/1 --> SPI_MODE_3
58 struct spi_numaker_data *data = dev->data; in spi_numaker_configure()
59 const struct spi_numaker_config *dev_cfg = dev->config; in spi_numaker_configure()
62 if (spi_context_configured(&data->ctx, config)) { in spi_numaker_configure()
66 if (SPI_MODE_GET(config->operation) & SPI_MODE_LOOP) { in spi_numaker_configure()
68 return -ENOTSUP; in spi_numaker_configure()
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/Zephyr-latest/drivers/adc/
Dadc_rpi_pico.c5 * SPDX-License-Identifier: Apache-2.0
27 #define ADC_RPI_CHANNEL_NUM (ADC_CS_RROBIN_MSB - ADC_CS_RROBIN_LSB + 1)
55 /** Structure that handle state of ongoing read operation */
69 hw_set_bits(&adc_hw->cs, ADC_CS_START_ONCE_BITS); in adc_start_once()
74 return (uint16_t)adc_hw->result; in adc_get_result()
79 return (adc_hw->cs & ADC_CS_ERR_BITS) ? true : false; in adc_get_err()
85 hw_set_bits(&adc_hw->fcs, ADC_FCS_OVER_BITS); in adc_clear_errors()
86 hw_set_bits(&adc_hw->fcs, ADC_FCS_UNDER_BITS); in adc_clear_errors()
87 hw_set_bits(&adc_hw->fcs, ADC_FCS_ERR_BITS); in adc_clear_errors()
88 hw_set_bits(&adc_hw->cs, ADC_CS_ERR_STICKY_BITS); in adc_clear_errors()
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/Zephyr-latest/drivers/mipi_dbi/
Dmipi_dbi_nxp_lcdic.c4 * SPDX-License-Identifier: Apache-2.0
133 /* RX and TX FIFO thresholds */
143 * 5x the module clock before other registers are read
150 /* Resets state of the LCDIC TX/RX FIFO */
153 const struct mipi_dbi_lcdic_config *config = dev->config; in mipi_dbi_lcdic_reset_state()
154 LCDIC_Type *base = config->base; in mipi_dbi_lcdic_reset_state()
156 base->CTRL &= ~LCDIC_CTRL_LCDIC_EN_MASK; in mipi_dbi_lcdic_reset_state()
158 base->CTRL |= LCDIC_CTRL_LCDIC_EN_MASK; in mipi_dbi_lcdic_reset_state()
165 /* Start DMA to send data using LCDIC TX FIFO */
168 const struct mipi_dbi_lcdic_config *config = dev->config; in mipi_dbi_lcdic_start_dma()
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/Zephyr-latest/drivers/can/
Dcan_mcp251xfd.c5 * SPDX-License-Identifier: Apache-2.0
27 if ((src->flags & CAN_FRAME_IDE) != 0) { in mcp251xfd_canframe_to_txobj()
28 dst->id = FIELD_PREP(MCP251XFD_OBJ_ID_SID_MASK, src->id >> 18); in mcp251xfd_canframe_to_txobj()
29 dst->id |= FIELD_PREP(MCP251XFD_OBJ_ID_EID_MASK, src->id); in mcp251xfd_canframe_to_txobj()
31 dst->flags |= MCP251XFD_OBJ_FLAGS_IDE; in mcp251xfd_canframe_to_txobj()
33 dst->id = FIELD_PREP(MCP251XFD_OBJ_ID_SID_MASK, src->id); in mcp251xfd_canframe_to_txobj()
36 if ((src->flags & CAN_FRAME_BRS) != 0) { in mcp251xfd_canframe_to_txobj()
37 dst->flags |= MCP251XFD_OBJ_FLAGS_BRS; in mcp251xfd_canframe_to_txobj()
40 dst->flags |= FIELD_PREP(MCP251XFD_OBJ_FLAGS_DLC_MASK, src->dlc); in mcp251xfd_canframe_to_txobj()
42 if ((src->flags & CAN_FRAME_FDF) != 0) { in mcp251xfd_canframe_to_txobj()
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/Zephyr-latest/include/zephyr/drivers/
Dsensor.h10 * SPDX-License-Identifier: Apache-2.0
42 * and can be obtained using the formula val1 + val2 * 10^(-6). Negative
47 * -0.5: val1 = 0, val2 = -500000
48 * -1.0: val1 = -1, val2 = 0
49 * -1.5: val1 = -1, val2 = -500000
54 /** Fractional part of the value (in one-millionth parts). */
101 /** Illuminance in infra-red spectrum, in lux. */
112 /** 1.0 micro-meters Particulate Matter, in ug/m^3 */
114 /** 2.5 micro-meters Particulate Matter, in ug/m^3 */
116 /** 10 micro-meters Particulate Matter, in ug/m^3 */
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/Zephyr-latest/doc/services/tracing/
Dindex.rst10 your application and allows :ref:`tools` running on a host to visualize the inner-working of
13 Every system has application-specific events to trace out. Historically,
16 1. Determining the application-specific payload,
17 2. Choosing suitable serialization-format,
18 3. Writing the on-target serialization code,
20 5. Writing the PC-side deserializer/parser,
21 6. Writing custom ad-hoc tools for filtering and presentation.
57 formats. This enables tool reuse, of which line-textual (babeltrace) and
61 See `CTF - A Flexible, High-performance Binary Trace Format
71 --------------------
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