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/Zephyr-latest/dts/bindings/can/
Dcan-fd-controller.yaml3 include: can-controller.yaml
6 bus-speed-data:
10 Deprecated. This property has been renamed to bitrate-data.
12 Initial data phase bitrate in bit/s. If this is unset, the initial data phase bitrate is set
14 bitrate-data:
17 Initial data phase bitrate in bit/s. If this is unset, the initial data phase bitrate is set
19 sample-point-data:
22 Initial data phase sample point in per mille (e.g. 875 equals 87.5%).
/Zephyr-latest/doc/hardware/peripherals/can/
Dshell.rst31 timing for the CAN FD data phase).
38 For example, building the :zephyr:code-sample:`hello_world` sample for the :zephyr:board:`frdm_k64f…
41 .. zephyr-app-commands::
42 :zephyr-app: samples/hello_world
44 …:gen-args: -DCONFIG_SHELL=y -DCONFIG_CAN=y -DCONFIG_CAN_SHELL=y -DCONFIG_STATS=y -DCONFIG_CAN_STAT…
48 interact with the shell. The CAN shell comes with built-in help (unless
49 :kconfig:option:`CONFIG_SHELL_HELP` is disabled). The built-in help messages can be printed by
50 passing ``-h`` or ``--help`` to the ``can`` command or any of its subcommands. All subcommands also
51 support tab-completion of their arguments.
55 also supports tab-completion. A list of all devices available can be obtained using the ``device
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Dcontroller.rst13 Controller Area Network is a two-wire serial bus specified by the
14 Bosch CAN Specification, Bosch CAN with Flexible Data-Rate specification and the
15 ISO 11898-1:2003 standard.
26 The bit-timing as defined in ISO 11898-1:2003 looks as following:
41 The bit-rate is calculated from the time of a time quantum and the values
45 The bit-rate is the inverse of the length of a single bit.
56 The timing parameters (SJW, bitrate and sampling point, or bitrate, Prop_Seg,
57 Phase_Seg1and Phase_Seg2) are initially set from the device-tree and can be
58 changed at run-time from the timing-API.
60 CAN uses so-called identifiers to identify the frame instead of addresses to
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/Zephyr-latest/drivers/can/
DKconfig4 # SPDX-License-Identifier: Apache-2.0
17 module-str = CAN
27 int "Default CAN bitrate"
30 Default initial CAN bitrate in bits/s. This can be overridden per CAN controller using the
31 "bitrate" devicetree property.
34 int "Default CAN data phase bitrate"
38 Default initial CAN data phase bitrate in bits/s. This can be overridden per CAN controller
39 using the "bitrate-data" devicetree property.
65 bool "Produce scripting-friendly output"
67 Enable scripting-friendly/machine-readable output from the CAN shell. Enabling this
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Dcan_shell.c5 * SPDX-License-Identifier: Apache-2.0
36 /* zephyr-keep-sorted-start */
38 CAN_SHELL_MODE_MAPPING("listen-only", CAN_MODE_LISTENONLY),
40 CAN_SHELL_MODE_MAPPING("manual-recovery", CAN_MODE_MANUAL_RECOVERY),
42 CAN_SHELL_MODE_MAPPING("one-shot", CAN_MODE_ONE_SHOT),
43 CAN_SHELL_MODE_MAPPING("triple-sampling", CAN_MODE_3_SAMPLES),
44 /* zephyr-keep-sorted-stop */
77 static void can_shell_dummy_bypass_cb(const struct shell *sh, uint8_t *data, size_t len) in can_shell_dummy_bypass_cb() argument
80 ARG_UNUSED(data); in can_shell_dummy_bypass_cb()
88 uint8_t nbytes = can_dlc_to_bytes(frame->dlc); in can_shell_print_frame()
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/Zephyr-latest/tests/drivers/can/timing/src/
Dmain.c2 * Copyright (c) 2022-2024 Vestas Wind Systems A/S
5 * SPDX-License-Identifier: Apache-2.0
28 /** Bitrate in bit/s */
29 uint32_t bitrate; member
52 * @brief List of CAN FD data phase timing values to test.
55 /* CiA 601-2 recommended data phase bitrates */
66 * @brief Assert that a CAN timing struct matches the specified bitrate
68 * Assert that the values of a CAN timing struct matches the specified bitrate
73 * @param bitrate the CAN bitrate in bit/s
76 uint32_t bitrate) in assert_bitrate_correct() argument
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/Zephyr-latest/drivers/i2c/
Di2c_renesas_ra_iic.c4 * SPDX-License-Identifier: Apache-2.0
57 uint32_t bitrate; member
67 struct i2c_ra_iic_data *data = (struct i2c_ra_iic_data *const)dev->data; in i2c_ra_iic_configure() local
71 return -EIO; in i2c_ra_iic_configure()
76 data->fsp_config.rate = I2C_MASTER_RATE_STANDARD; in i2c_ra_iic_configure()
79 data->fsp_config.rate = I2C_MASTER_RATE_FAST; in i2c_ra_iic_configure()
82 data->fsp_config.rate = I2C_MASTER_RATE_FASTPLUS; in i2c_ra_iic_configure()
86 return -EIO; in i2c_ra_iic_configure()
90 calc_iic_master_clock_setting(dev, data->fsp_config.rate, in i2c_ra_iic_configure()
91 &data->iic_master_ext_cfg.clock_settings); in i2c_ra_iic_configure()
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Di2c_ifx_xmc4.c5 * SPDX-License-Identifier: Apache-2.0
20 #include "i2c-priv.h"
56 /* Data structure */
75 uint32_t bitrate; member
81 struct ifx_xmc4_i2c_data *data = dev->data; in ifx_xmc4_i2c_configure() local
82 const struct ifx_xmc4_i2c_config *config = dev->config; in ifx_xmc4_i2c_configure()
87 return -EIO; in ifx_xmc4_i2c_configure()
92 data->cfg.baudrate = XMC4_I2C_SPEED_STANDARD; in ifx_xmc4_i2c_configure()
95 data->cfg.baudrate = XMC4_I2C_SPEED_FAST; in ifx_xmc4_i2c_configure()
99 return -ERANGE; in ifx_xmc4_i2c_configure()
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Di2c_esp32.c5 * SPDX-License-Identifier: Apache-2.0
10 /* Include esp-idf headers first to avoid redefining BIT() macro */
31 #include "i2c-priv.h"
44 #define I2C_CLOCK_INVALID (-1)
96 const uint32_t bitrate; member
151 const struct i2c_esp32_config *config = dev->config; in i2c_esp32_config_pin()
154 if (config->index >= SOC_I2C_NUM) { in i2c_esp32_config_pin()
156 return -EINVAL; in i2c_esp32_config_pin()
159 gpio_pin_set_dt(&config->sda.gpio, 1); in i2c_esp32_config_pin()
160 ret = gpio_pin_configure_dt(&config->sda.gpio, GPIO_PULL_UP | GPIO_OUTPUT | GPIO_INPUT); in i2c_esp32_config_pin()
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Di2c_sam4l_twim.c3 * Copyright (c) 2020-2023 Gerson Fernando Budke <nandojve@gmail.com>
5 * SPDX-License-Identifier: Apache-2.0
33 #include "i2c-priv.h"
69 uint32_t bitrate; member
87 /* Device run time data */
109 const struct i2c_sam_twim_dev_cfg *const cfg = dev->config; in i2c_clk_set()
110 Twim *const twim = cfg->regs; in i2c_clk_set()
126 return -EIO; in i2c_clk_set()
130 TWIM_HSCWGR_HIGH(f_prescaled - in i2c_clk_set()
140 twim->HSCWGR = cwgr_reg_val; in i2c_clk_set()
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Di2c_b91.c4 * SPDX-License-Identifier: Apache-2.0
16 #include "i2c-priv.h"
21 uint32_t bitrate; member
25 /* I2C data structure */
39 LOG_ERR("10-bits address is not supported"); in i2c_b91_configure()
40 return -ENOTSUP; in i2c_b91_configure()
46 return -ENOTSUP; in i2c_b91_configure()
64 return -ENOTSUP; in i2c_b91_configure()
82 struct i2c_b91_data *data = dev->data; in i2c_b91_transfer() local
85 k_sem_take(&data->mutex, K_FOREVER); in i2c_b91_transfer()
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Di2c_sbcon.c4 * SPDX-License-Identifier: Apache-2.0
11 * @brief Driver for ARM's SBCon 2-wire serial bus interface
14 * hardware state of two-bit serial interfaces like I2C.
24 #include "i2c-priv.h"
43 uint32_t bitrate; /* I2C bus speed in Hz */ member
46 /* Driver instance data */
48 struct i2c_bitbang bitbang; /* Bit-bang library data */
56 sbcon->SB_CONTROLS = SCL; in i2c_sbcon_set_scl()
58 sbcon->SB_CONTROLC = SCL; in i2c_sbcon_set_scl()
67 sbcon->SB_CONTROLS = SDA; in i2c_sbcon_set_sda()
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Di2c_sam_twihs_rtio.c6 * SPDX-License-Identifier: Apache-2.0
33 #include "i2c-priv.h"
48 uint32_t bitrate; member
54 /* Device run time data */
70 cl_div = ((SOC_ATMEL_SAM_MCK_FREQ_HZ / (speed * 2U)) - 3) in i2c_clk_set()
82 return -EIO; in i2c_clk_set()
86 twihs->TWIHS_CWGR = TWIHS_CWGR_CLDIV(cl_div) | TWIHS_CWGR_CHDIV(cl_div) in i2c_clk_set()
94 const struct i2c_sam_twihs_dev_cfg *const dev_cfg = dev->config; in i2c_sam_twihs_configure()
95 Twihs *const twihs = dev_cfg->regs; in i2c_sam_twihs_configure()
96 uint32_t bitrate; in i2c_sam_twihs_configure() local
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Di2c_gd32.c4 * SPDX-License-Identifier: Apache-2.0
25 #include "i2c-priv.h"
38 uint32_t bitrate; member
59 I2C_CTL1(cfg->reg) |= I2C_CTL1_ERRIE; in i2c_gd32_enable_interrupts()
60 I2C_CTL1(cfg->reg) |= I2C_CTL1_EVIE; in i2c_gd32_enable_interrupts()
61 I2C_CTL1(cfg->reg) |= I2C_CTL1_BUFIE; in i2c_gd32_enable_interrupts()
66 I2C_CTL1(cfg->reg) &= ~I2C_CTL1_ERRIE; in i2c_gd32_disable_interrupts()
67 I2C_CTL1(cfg->reg) &= ~I2C_CTL1_EVIE; in i2c_gd32_disable_interrupts()
68 I2C_CTL1(cfg->reg) &= ~I2C_CTL1_BUFIE; in i2c_gd32_disable_interrupts()
71 static inline void i2c_gd32_xfer_read(struct i2c_gd32_data *data, in i2c_gd32_xfer_read() argument
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Di2c_sam_twihs.c5 * SPDX-License-Identifier: Apache-2.0
32 #include "i2c-priv.h"
47 uint32_t bitrate; member
54 /* Buffer containing data to read or write */
66 /* Device run time data */
82 cl_div = ((SOC_ATMEL_SAM_MCK_FREQ_HZ / (speed * 2U)) - 3) in i2c_clk_set()
94 return -EIO; in i2c_clk_set()
98 twihs->TWIHS_CWGR = TWIHS_CWGR_CLDIV(cl_div) | TWIHS_CWGR_CHDIV(cl_div) in i2c_clk_set()
106 const struct i2c_sam_twihs_dev_cfg *const dev_cfg = dev->config; in i2c_sam_twihs_configure()
107 Twihs *const twihs = dev_cfg->regs; in i2c_sam_twihs_configure()
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Di2c_sam_twi.c5 * SPDX-License-Identifier: Apache-2.0
14 * - Only I2C Master Mode with 7 bit addressing is currently supported.
15 * - No reentrancy support.
34 #include "i2c-priv.h"
47 uint32_t bitrate; member
54 /* Buffer containing data to read or write */
66 /* Device run time data */
83 cl_div = ((SOC_ATMEL_SAM_MCK_FREQ_HZ / (speed * 2U)) - 4) in i2c_clk_set()
95 return -EIO; in i2c_clk_set()
99 twi->TWI_CWGR = TWI_CWGR_CLDIV(cl_div) | TWI_CWGR_CHDIV(cl_div) in i2c_clk_set()
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Di2c_max32_rtio.c4 * SPDX-License-Identifier: Apache-2.0
38 uint32_t bitrate; member
63 dev->data)->ctx; in max32_configure()
71 const struct max32_i2c_config *const cfg = dev->config; in max32_do_configure()
72 mxc_i2c_regs_t *i2c = cfg->regs; in max32_do_configure()
97 return -ENOTSUP; in max32_do_configure()
109 const struct max32_i2c_config *const cfg = dev->config; in max32_msg_start()
110 struct max32_i2c_data *data = dev->data; in max32_msg_start() local
111 mxc_i2c_regs_t *i2c = cfg->regs; in max32_msg_start()
112 mxc_i2c_req_t *req = &data->req; in max32_msg_start()
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Di2c_gpio.c5 * SPDX-License-Identifier: Apache-2.0
18 * suitable flags, i.e. the SDA pin as open-collector/open-drain with a pull-up
37 #include "i2c-priv.h"
44 uint32_t bitrate; member
47 /* Driver instance data */
49 struct i2c_bitbang bitbang; /* Bit-bang library data */
57 gpio_pin_set_dt(&config->scl_gpio, state); in i2c_gpio_set_scl()
64 gpio_pin_set_dt(&config->sda_gpio, state); in i2c_gpio_set_sda()
70 int rc = gpio_pin_get_dt(&config->sda_gpio); in i2c_gpio_get_sda()
84 struct i2c_gpio_context *context = dev->data; in i2c_gpio_configure()
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Di2c_numaker.c4 * SPDX-License-Identifier: Apache-2.0
18 #include "i2c-priv.h"
27 #define M_TRAN_DATA_ACK 0x28 /* Master Transmit Data ACK */
28 #define M_TRAN_DATA_NACK 0x30 /* Master Transmit Data NACK */
32 #define M_RECE_DATA_ACK 0x50 /* Master Receive Data ACK */
33 #define M_RECE_DATA_NACK 0x58 /* Master Receive Data NACK */
39 #define S_TRAN_DATA_ACK 0xB8 /* Slave Transmit Data ACK */
40 #define S_TRAN_DATA_NACK 0xC0 /* Slave Transmit Data NACK */
41 #define S_TRAN_LAST_DATA_ACK 0xC8 /* Slave Transmit Last Data ACK */
44 #define S_RECE_DATA_ACK 0x80 /* Slave Receive Data ACK */
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/Zephyr-latest/drivers/peci/
Dpeci_ite_it8xxx2.c4 * SPDX-License-Identifier: Apache-2.0
28 * This driver is single-instance. If the devicetree contains multiple
34 /* The following constants describes the bitrate of it8xxx2 PECI,
41 /* The following masks are designed for the PECI bitrate settings,
103 uint32_t bitrate; member
121 reg_base->PADCTLR = (reg_base->PADCTLR & PECI_DVIE) | vol_opt; in peci_it8xxx2_init_vtts()
126 reg_base->HOSTAR = HOSTAR_RST_ANYBIT; in peci_it8xxx2_rst_status()
131 return (reg_base->HOSTAR & HOBY) ? (-EBUSY) : 0; in peci_it8xxx2_check_host_busy()
136 struct peci_it8xxx2_data *data = dev->data; in peci_it8xxx2_check_host_finish() local
137 const struct peci_it8xxx2_config *config = dev->config; in peci_it8xxx2_check_host_finish()
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Dpeci_mchp_xec.c4 * SPDX-License-Identifier: Apache-2.0
63 uint32_t bitrate; member
71 static void peci_xec_pm_policy_state_lock_get(struct peci_xec_data *data, in peci_xec_pm_policy_state_lock_get() argument
74 if (atomic_test_and_set_bit(data->pm_policy_state_flag, flag) == 0) { in peci_xec_pm_policy_state_lock_get()
79 static void peci_xec_pm_policy_state_lock_put(struct peci_xec_data *data, in peci_xec_pm_policy_state_lock_put() argument
82 if (atomic_test_and_clear_bit(data->pm_policy_state_flag, flag) == 1) { in peci_xec_pm_policy_state_lock_put()
91 const struct peci_xec_config * const cfg = dev->config; in peci_girq_enable()
93 mchp_xec_ecia_girq_src_en(cfg->girq, cfg->girq_pos); in peci_girq_enable()
98 const struct peci_xec_config * const cfg = dev->config; in peci_girq_status_clear()
100 mchp_soc_ecia_girq_src_clr(cfg->girq, cfg->girq_pos); in peci_girq_status_clear()
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/Zephyr-latest/include/zephyr/drivers/
Dcan.h6 * SPDX-License-Identifier: Apache-2.0
45 * @brief Bit mask for a standard (11-bit) CAN identifier.
50 * @brief Bit mask for an extended (29-bit) CAN identifier.
55 * @brief Maximum data length code for CAN 2.0A/2.0B.
60 * @brief Maximum data length code for CAN FD.
66 * Internally calculated maximum data length
103 /** Controller requires manual recovery after entering bus-off state */
122 /** Error-active state (RX/TX error count < 96). */
124 /** Error-warning state (RX/TX error count < 128). */
126 /** Error-passive state (RX/TX error count < 256). */
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Dpeci.h4 * SPDX-License-Identifier: Apache-2.0
213 * Valid pointer on a data buffer, or NULL otherwise.
217 * Length of the data buffer expected to be received without considering
234 /** Pointer to buffer of write data */
236 /** Pointer to buffer of read data */
249 typedef int (*peci_config_t)(const struct device *dev, uint32_t bitrate);
269 * @param bitrate the selected bitrate expressed in Kbps.
274 __syscall int peci_config(const struct device *dev, uint32_t bitrate);
277 uint32_t bitrate) in z_impl_peci_config() argument
281 api = (struct peci_driver_api *)dev->api; in z_impl_peci_config()
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/Zephyr-latest/tests/drivers/can/api/src/
Dcanfd.c5 * SPDX-License-Identifier: Apache-2.0
27 zassert_equal(frame->id, TEST_CAN_STD_ID_1, "ID does not match"); in tx_std_callback_1()
37 zassert_equal(frame->id, TEST_CAN_STD_ID_2, "ID does not match"); in tx_std_callback_2()
100 zassert_not_equal(err, -EBUSY, "arbitration lost in loopback mode"); in send_test_frame()
120 zassert_not_equal(err, -EBUSY, "arbitration lost in loopback mode"); in send_test_frame_nowait()
137 zassert_not_equal(filter_id, -ENOSPC, "no filters available"); in add_rx_msgq()
161 zassert_not_equal(filter_id, -ENOSPC, "no filters available"); in add_rx_filter()
196 if ((frame1->flags & CAN_FRAME_FDF) != 0) { in send_receive()
202 if ((frame2->flags & CAN_FRAME_FDF) != 0) { in send_receive()
256 zassert_equal(err, -EINVAL, "wrong error on sending invalid frame (err %d)", err); in ZTEST()
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/Zephyr-latest/tests/drivers/can/host/
DREADME.rst9 This test suite uses `python-can`_ for testing Controller Area Network (CAN) communication between a
17 * The python-can library installed on the host PC.
25 the ``bitrate`` and ``bitrate-data`` CAN controller devicetree properties if needed. Default
26 bitrates are 125 kbits/s for the arbitration phase/CAN classic and 1 Mbit/s for the CAN FD data
27 phase when using bitrate switching (BRS).
29 The host end of the CAN fixture can be configured through python-can. Available configuration
30 options depend on the type of host CAN adapter used. The python-can library provides a lot of
31 flexibility for configuration as decribed in the `python-can configuration`_ page, all centered
35 * By default, the python-can configuration context is not specified, causing python-can to use the
38 ``:`` (i.e. specify fixture ``can:zcan0`` to use the ``zcan0`` python-can configuration context).
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