Lines Matching +full:bitrate +full:- +full:data
5 * SPDX-License-Identifier: Apache-2.0
14 * - Only I2C Master Mode with 7 bit addressing is currently supported.
15 * - No reentrancy support.
34 #include "i2c-priv.h"
47 uint32_t bitrate; member
54 /* Buffer containing data to read or write */
66 /* Device run time data */
83 cl_div = ((SOC_ATMEL_SAM_MCK_FREQ_HZ / (speed * 2U)) - 4) in i2c_clk_set()
95 return -EIO; in i2c_clk_set()
99 twi->TWI_CWGR = TWI_CWGR_CLDIV(cl_div) | TWI_CWGR_CHDIV(cl_div) in i2c_clk_set()
107 const struct i2c_sam_twi_dev_cfg *const dev_cfg = dev->config; in i2c_sam_twi_configure()
108 struct i2c_sam_twi_dev_data *const dev_data = dev->data; in i2c_sam_twi_configure()
109 Twi *const twi = dev_cfg->regs; in i2c_sam_twi_configure()
110 uint32_t bitrate; in i2c_sam_twi_configure() local
115 return -EIO; in i2c_sam_twi_configure()
119 LOG_ERR("I2C 10-bit addressing is currently not supported"); in i2c_sam_twi_configure()
121 return -EIO; in i2c_sam_twi_configure()
127 bitrate = BUS_SPEED_STANDARD_HZ; in i2c_sam_twi_configure()
130 bitrate = BUS_SPEED_FAST_HZ; in i2c_sam_twi_configure()
134 return -EIO; in i2c_sam_twi_configure()
137 k_sem_take(&dev_data->lock, K_FOREVER); in i2c_sam_twi_configure()
140 ret = i2c_clk_set(twi, bitrate); in i2c_sam_twi_configure()
146 twi->TWI_CR = TWI_CR_SVDIS; in i2c_sam_twi_configure()
149 twi->TWI_CR = TWI_CR_MSEN; in i2c_sam_twi_configure()
153 k_sem_give(&dev_data->lock); in i2c_sam_twi_configure()
161 twi->TWI_MMR = TWI_MMR_DADR(daddr); in write_msg_start()
163 /* Write first data byte on I2C bus */ in write_msg_start()
164 twi->TWI_THR = msg->buf[msg->idx++]; in write_msg_start()
167 twi->TWI_IER = TWI_IER_TXRDY | TWI_IER_TXCOMP | TWI_IER_NACK; in write_msg_start()
175 twi->TWI_MMR = TWI_MMR_MREAD | TWI_MMR_DADR(daddr); in read_msg_start()
177 /* In single data byte read the START and STOP must both be set */ in read_msg_start()
178 twi_cr_stop = (msg->len == 1U) ? TWI_CR_STOP : 0; in read_msg_start()
180 twi->TWI_CR = TWI_CR_START | twi_cr_stop; in read_msg_start()
183 twi->TWI_IER = TWI_IER_RXRDY | TWI_IER_TXCOMP | TWI_IER_NACK; in read_msg_start()
190 const struct i2c_sam_twi_dev_cfg *const dev_cfg = dev->config; in i2c_sam_twi_transfer()
191 struct i2c_sam_twi_dev_data *const dev_data = dev->data; in i2c_sam_twi_transfer()
192 Twi *const twi = dev_cfg->regs; in i2c_sam_twi_transfer()
199 k_sem_take(&dev_data->lock, K_FOREVER); in i2c_sam_twi_transfer()
202 (void)twi->TWI_SR; in i2c_sam_twi_transfer()
205 twi->TWI_IADR = 0; in i2c_sam_twi_transfer()
207 for (; num_msgs > 0; num_msgs--, msgs++) { in i2c_sam_twi_transfer()
208 dev_data->msg.buf = msgs->buf; in i2c_sam_twi_transfer()
209 dev_data->msg.len = msgs->len; in i2c_sam_twi_transfer()
210 dev_data->msg.idx = 0U; in i2c_sam_twi_transfer()
211 dev_data->msg.twi_sr = 0U; in i2c_sam_twi_transfer()
212 dev_data->msg.flags = msgs->flags; in i2c_sam_twi_transfer()
224 dev_data->msg.flags |= I2C_MSG_STOP; in i2c_sam_twi_transfer()
228 if ((msgs->flags & I2C_MSG_RW_MASK) == I2C_MSG_READ) { in i2c_sam_twi_transfer()
229 read_msg_start(twi, &dev_data->msg, addr); in i2c_sam_twi_transfer()
231 write_msg_start(twi, &dev_data->msg, addr); in i2c_sam_twi_transfer()
234 k_sem_take(&dev_data->sem, K_FOREVER); in i2c_sam_twi_transfer()
236 if (dev_data->msg.twi_sr > 0) { in i2c_sam_twi_transfer()
238 ret = -EIO; in i2c_sam_twi_transfer()
245 k_sem_give(&dev_data->lock); in i2c_sam_twi_transfer()
252 const struct i2c_sam_twi_dev_cfg *const dev_cfg = dev->config; in i2c_sam_twi_isr()
253 struct i2c_sam_twi_dev_data *const dev_data = dev->data; in i2c_sam_twi_isr()
254 Twi *const twi = dev_cfg->regs; in i2c_sam_twi_isr()
255 struct twi_msg *msg = &dev_data->msg; in i2c_sam_twi_isr()
259 isr_status = twi->TWI_SR & twi->TWI_IMR; in i2c_sam_twi_isr()
263 msg->twi_sr = isr_status; in i2c_sam_twi_isr()
270 msg->buf[msg->idx++] = twi->TWI_RHR; in i2c_sam_twi_isr()
272 if (msg->idx == msg->len - 1U) { in i2c_sam_twi_isr()
274 twi->TWI_CR = TWI_CR_STOP; in i2c_sam_twi_isr()
280 if (msg->idx == msg->len) { in i2c_sam_twi_isr()
281 if (msg->flags & I2C_MSG_STOP) { in i2c_sam_twi_isr()
283 twi->TWI_CR = TWI_CR_STOP; in i2c_sam_twi_isr()
285 twi->TWI_IDR = TWI_IDR_TXRDY; in i2c_sam_twi_isr()
291 twi->TWI_THR = msg->buf[msg->idx++]; in i2c_sam_twi_isr()
304 twi->TWI_IDR = twi->TWI_IMR; in i2c_sam_twi_isr()
306 k_sem_give(&dev_data->sem); in i2c_sam_twi_isr()
311 const struct i2c_sam_twi_dev_cfg *const dev_cfg = dev->config; in i2c_sam_twi_initialize()
312 struct i2c_sam_twi_dev_data *const dev_data = dev->data; in i2c_sam_twi_initialize()
313 Twi *const twi = dev_cfg->regs; in i2c_sam_twi_initialize()
318 dev_cfg->irq_config(); in i2c_sam_twi_initialize()
321 k_sem_init(&dev_data->lock, 1, 1); in i2c_sam_twi_initialize()
322 k_sem_init(&dev_data->sem, 0, 1); in i2c_sam_twi_initialize()
325 ret = pinctrl_apply_state(dev_cfg->pcfg, PINCTRL_STATE_DEFAULT); in i2c_sam_twi_initialize()
332 (clock_control_subsys_t)&dev_cfg->clock_cfg); in i2c_sam_twi_initialize()
335 twi->TWI_CR = TWI_CR_SWRST; in i2c_sam_twi_initialize()
337 bitrate_cfg = i2c_map_dt_bitrate(dev_cfg->bitrate); in i2c_sam_twi_initialize()
341 LOG_ERR("Failed to initialize %s device", dev->name); in i2c_sam_twi_initialize()
346 irq_enable(dev_cfg->irq_id); in i2c_sam_twi_initialize()
348 LOG_INF("Device %s initialized", dev->name); in i2c_sam_twi_initialize()
376 .bitrate = DT_INST_PROP(n, clock_frequency), \