6  * SPDX-License-Identifier: Apache-2.0
33 #include "i2c-priv.h"
48 	uint32_t bitrate;  member
54 /* Device run time data */
70 		cl_div =   ((SOC_ATMEL_SAM_MCK_FREQ_HZ / (speed * 2U)) - 3)  in i2c_clk_set()
82 		return -EIO;  in i2c_clk_set()
86 	twihs->TWIHS_CWGR = TWIHS_CWGR_CLDIV(cl_div) | TWIHS_CWGR_CHDIV(cl_div)  in i2c_clk_set()
94 	const struct i2c_sam_twihs_dev_cfg *const dev_cfg = dev->config;  in i2c_sam_twihs_configure()
95 	Twihs *const twihs = dev_cfg->regs;  in i2c_sam_twihs_configure()
96 	uint32_t bitrate;  in i2c_sam_twihs_configure()  local
101 		return -EIO;  in i2c_sam_twihs_configure()
105 		LOG_ERR("I2C 10-bit addressing is currently not supported");  in i2c_sam_twihs_configure()
107 		return -EIO;  in i2c_sam_twihs_configure()
113 		bitrate = BUS_SPEED_STANDARD_HZ;  in i2c_sam_twihs_configure()
116 		bitrate = BUS_SPEED_FAST_HZ;  in i2c_sam_twihs_configure()
120 		return -EIO;  in i2c_sam_twihs_configure()
124 	ret = i2c_clk_set(twihs, bitrate);  in i2c_sam_twihs_configure()
130 	twihs->TWIHS_CR = TWIHS_CR_SVDIS;  in i2c_sam_twihs_configure()
133 	twihs->TWIHS_CR = TWIHS_CR_MSEN;  in i2c_sam_twihs_configure()
142 	twihs->TWIHS_MMR = TWIHS_MMR_DADR(daddr);  in write_msg_start()
144 	/* Write first data byte on I2C bus */  in write_msg_start()
145 	twihs->TWIHS_THR = buf[idx];  in write_msg_start()
148 	twihs->TWIHS_IER = TWIHS_IER_TXRDY | TWIHS_IER_TXCOMP | TWIHS_IER_NACK;  in write_msg_start()
157 	twihs->TWIHS_MMR = TWIHS_MMR_MREAD | TWIHS_MMR_DADR(daddr);  in read_msg_start()
159 	/* In single data byte read the START and STOP must both be set */  in read_msg_start()
163 	twihs->TWIHS_IER = TWIHS_IER_RXRDY | TWIHS_IER_TXCOMP | TWIHS_IER_NACK;  in read_msg_start()
166 	twihs->TWIHS_CR = TWIHS_CR_START | twihs_cr_stop;  in read_msg_start()
173 	struct i2c_sam_twihs_dev_data *const dev_data = dev->data;  in i2c_sam_twihs_start()
174 	const struct i2c_sam_twihs_dev_cfg *const dev_cfg = dev->config;  in i2c_sam_twihs_start()
175 	Twihs *const twihs = dev_cfg->regs;  in i2c_sam_twihs_start()
176 	struct rtio_sqe *sqe = &dev_data->ctx->txn_curr->sqe;  in i2c_sam_twihs_start()
177 	struct i2c_dt_spec *dt_spec = sqe->iodev->data;  in i2c_sam_twihs_start()
180 	(void)twihs->TWIHS_SR;  in i2c_sam_twihs_start()
183 	twihs->TWIHS_IADR = 0;  in i2c_sam_twihs_start()
186 	dev_data->buf_idx = 0;  in i2c_sam_twihs_start()
188 	switch (sqe->op) {  in i2c_sam_twihs_start()
190 		read_msg_start(twihs, sqe->rx.buf_len, dt_spec->addr);  in i2c_sam_twihs_start()
193 		dev_data->buf_idx = 1;  in i2c_sam_twihs_start()
194 		write_msg_start(twihs, sqe->tx.buf, 0, dt_spec->addr);  in i2c_sam_twihs_start()
197 		LOG_ERR("Invalid op code %d for submission %p\n", sqe->op, (void *)sqe);  in i2c_sam_twihs_start()
198 		i2c_sam_twihs_complete(dev, -EINVAL);  in i2c_sam_twihs_start()
204 	const struct i2c_sam_twihs_dev_cfg *const dev_cfg = dev->config;  in i2c_sam_twihs_complete()
205 	Twihs *const twihs = dev_cfg->regs;  in i2c_sam_twihs_complete()
207 		dev->data)->ctx;  in i2c_sam_twihs_complete()
210 	twihs->TWIHS_IDR = twihs->TWIHS_IMR;  in i2c_sam_twihs_complete()
220 		dev->data)->ctx;  in i2c_sam_twihs_submit()
229 	const struct i2c_sam_twihs_dev_cfg *const dev_cfg = dev->config;  in i2c_sam_twihs_isr()
230 	struct i2c_sam_twihs_dev_data *const dev_data = dev->data;  in i2c_sam_twihs_isr()
231 	Twihs *const twihs = dev_cfg->regs;  in i2c_sam_twihs_isr()
232 	struct rtio_sqe *sqe = &dev_data->ctx->txn_curr->sqe;  in i2c_sam_twihs_isr()
236 	isr_status = twihs->TWIHS_SR & twihs->TWIHS_IMR;  in i2c_sam_twihs_isr()
240 		i2c_sam_twihs_complete(dev, -EIO);  in i2c_sam_twihs_isr()
246 		sqe->rx.buf[dev_data->buf_idx] = twihs->TWIHS_RHR;  in i2c_sam_twihs_isr()
247 		dev_data->buf_idx += 1;  in i2c_sam_twihs_isr()
249 		if (dev_data->buf_idx == sqe->rx.buf_len - 1U) {  in i2c_sam_twihs_isr()
251 			twihs->TWIHS_CR = TWIHS_CR_STOP;  in i2c_sam_twihs_isr()
257 		if (dev_data->buf_idx == sqe->tx.buf_len) {  in i2c_sam_twihs_isr()
258 			if (sqe->iodev_flags & RTIO_IODEV_I2C_STOP) {  in i2c_sam_twihs_isr()
260 				twihs->TWIHS_CR = TWIHS_CR_STOP;  in i2c_sam_twihs_isr()
262 				twihs->TWIHS_IDR = TWIHS_IDR_TXRDY;  in i2c_sam_twihs_isr()
269 			twihs->TWIHS_THR = sqe->tx.buf[dev_data->buf_idx++];  in i2c_sam_twihs_isr()
283 		dev->data)->ctx;  in i2c_sam_twihs_transfer()
290 	const struct i2c_sam_twihs_dev_cfg *const dev_cfg = dev->config;  in i2c_sam_twihs_initialize()
291 	struct i2c_sam_twihs_dev_data *const dev_data = dev->data;  in i2c_sam_twihs_initialize()
292 	Twihs *const twihs = dev_cfg->regs;  in i2c_sam_twihs_initialize()
297 	dev_cfg->irq_config();  in i2c_sam_twihs_initialize()
300 	ret = pinctrl_apply_state(dev_cfg->pcfg, PINCTRL_STATE_DEFAULT);  in i2c_sam_twihs_initialize()
307 			       (clock_control_subsys_t *)&dev_cfg->clock_cfg);  in i2c_sam_twihs_initialize()
310 	twihs->TWIHS_CR = TWIHS_CR_SWRST;  in i2c_sam_twihs_initialize()
312 	bitrate_cfg = i2c_map_dt_bitrate(dev_cfg->bitrate);  in i2c_sam_twihs_initialize()
316 		LOG_ERR("Failed to initialize %s device", dev->name);  in i2c_sam_twihs_initialize()
320 	i2c_rtio_init(dev_data->ctx, dev);  in i2c_sam_twihs_initialize()
323 	irq_enable(dev_cfg->irq_id);  in i2c_sam_twihs_initialize()
325 	LOG_INF("Device %s initialized", dev->name);  in i2c_sam_twihs_initialize()
355 		.bitrate = DT_INST_PROP(n, clock_frequency),					\