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/Zephyr-latest/drivers/counter/
DKconfig.nxp_pit1 # MCUXpresso SDK Periodic Interrupt Timer (PIT)
7 bool "NXP PIT driver"
12 Enable support for the NXP Periodic Interrupt Timer (PIT).
DKconfig.andes_atcpit1008 bool "Andes ATCPIT100 PIT driver"
12 Enable driver for the Andes ATCPIT100 PIT controller.
Dcounter_nxp_pit.c163 LOG_DBG("pit counter isr"); in nxp_pit_isr()
185 LOG_DBG("pit counter isr"); in nxp_pit_isr()
257 /* Creates a decleration for each pit channel */
/Zephyr-latest/dts/bindings/counter/
Dandestech,atcpit100.yaml8 This is a representation of the Andes Technology atcpit100 PIT node
33 for the PIT clock-frequency.
35 Defaults to 1 to use the PIT clock-frequency as the counter frequency.
41 For example, andes_v5_ae350 platform takes about 200 ~ 300 PIT
Dnxp,pit.yaml4 description: NXP Periodic Interrupt Timer (PIT)
6 compatible: "nxp,pit"
Dnxp,pit-channel.yaml7 compatible: "nxp,pit-channel"
/Zephyr-latest/dts/arm/nxp/
Dnxp_s32z27x_rtu0_r52.dtsi102 pit0: pit@76150000 {
103 compatible = "nxp,pit";
113 compatible = "nxp,pit-channel";
119 compatible = "nxp,pit-channel";
125 compatible = "nxp,pit-channel";
131 compatible = "nxp,pit-channel";
137 compatible = "nxp,pit-channel";
143 compatible = "nxp,pit-channel";
Dnxp_s32z27x_rtu1_r52.dtsi102 pit0: pit@76950000 {
103 compatible = "nxp,pit";
113 compatible = "nxp,pit-channel";
119 compatible = "nxp,pit-channel";
125 compatible = "nxp,pit-channel";
131 compatible = "nxp,pit-channel";
137 compatible = "nxp,pit-channel";
143 compatible = "nxp,pit-channel";
Dnxp_k8x.dtsi389 pit0: pit@40037000 {
390 compatible = "nxp,pit";
399 compatible = "nxp,pit-channel";
406 compatible = "nxp,pit-channel";
413 compatible = "nxp,pit-channel";
420 compatible = "nxp,pit-channel";
Dnxp_mcxc_common.dtsi302 pit0: pit@40037000 {
303 compatible = "nxp,pit";
313 compatible = "nxp,pit-channel";
319 compatible = "nxp,pit-channel";
Dnxp_k6x.dtsi541 pit0: pit@40037000 {
542 compatible = "nxp,pit";
551 compatible = "nxp,pit-channel";
558 compatible = "nxp,pit-channel";
565 compatible = "nxp,pit-channel";
572 compatible = "nxp,pit-channel";
Dnxp_rt11xx.dtsi1244 pit1: pit@400d8000 {
1245 compatible = "nxp,pit";
1255 compatible = "nxp,pit-channel";
1261 compatible = "nxp,pit-channel";
1267 compatible = "nxp,pit-channel";
1273 compatible = "nxp,pit-channel";
1279 pit2: pit@40cb0000 {
1280 compatible = "nxp,pit";
1290 compatible = "nxp,pit-channel";
1295 compatible = "nxp,pit-channel";
[all …]
Dnxp_rt10xx.dtsi1120 pit0: pit@40084000 {
1121 compatible = "nxp,pit";
1131 compatible = "nxp,pit-channel";
1137 compatible = "nxp,pit-channel";
1143 compatible = "nxp,pit-channel";
1149 compatible = "nxp,pit-channel";
/Zephyr-latest/include/zephyr/dt-bindings/clock/
Dimx_ccm_rev2.h112 /* PIT */
/Zephyr-latest/doc/releases/
Dmigration-guide-3.7.rst139 * The :dtcompatible:`nxp,kinetis-pit` pit driver has changed its compatible
140 to :dtcompatible:`nxp,pit` and has been updated to support multiple channels.
142 compatible :dtcompatible:`nxp,pit-channel` and configure as below.
145 of the binding for the pit. (:github:`66336`)
151 pit0: pit@40037000 {
152 /* Other Pit DT Attributes */
153 compatible = "nxp,pit";
160 compatible = "nxp,pit-channel";
/Zephyr-latest/drivers/timer/
Dhpet.c45 /* disables PIT */
449 * nothing in Zephyr disables the PIT which then fires in sys_clock_driver_init()
/Zephyr-latest/boards/nxp/mimxrt1010_evk/doc/
Dindex.rst94 | PIT | on-chip | pit |
/Zephyr-latest/boards/nxp/frdm_k82f/doc/
Dindex.rst100 | PIT | on-chip | pit |
/Zephyr-latest/modules/
DKconfig.mcux323 Set if the PIT module is present on the SoC.
/Zephyr-latest/dts/riscv/andes/
Dandes_v5_ae350.dtsi256 pit0: pit@f0400000 {
/Zephyr-latest/boards/nxp/frdm_k64f/doc/
Dindex.rst106 | PIT | on-chip | pit |
/Zephyr-latest/boards/nxp/mimxrt1160_evk/doc/
Dindex.rst139 | PIT | on-chip | pit |
/Zephyr-latest/boards/nxp/frdm_mcxc242/doc/
Dindex.rst69 | PIT | on-chip | counter |
/Zephyr-latest/boards/nxp/frdm_mcxc444/doc/
Dindex.rst62 | PIT | on-chip | counter |
/Zephyr-latest/boards/nxp/mimxrt1060_evk/doc/
Dindex.rst149 | PIT | on-chip | pit |

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