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/Zephyr-latest/drivers/i2c/
Di2c_gd32.c495 uint32_t pclk1, freq, clkc; in i2c_gd32_configure() local
505 &pclk1); in i2c_gd32_configure()
508 freq = pclk1 / 1000000U; in i2c_gd32_configure()
526 * T_pclk1 is reciprocal of pclk1: in i2c_gd32_configure()
527 * T_pclk1 = 1 / pclk1 in i2c_gd32_configure()
534 * CLKC = pclk1 / (bitrate * 2) in i2c_gd32_configure()
536 * CLKC = pclk1 / (bitrate * 25) in i2c_gd32_configure()
541 * T_pclk1: duration of single pclk1 pulse in i2c_gd32_configure()
542 * pclk1: i2c device clock frequency in i2c_gd32_configure()
563 /* CLKC = pclk1 / (bitrate * 2) */ in i2c_gd32_configure()
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/Zephyr-latest/soc/nuvoton/numicro/m48x/
Dsoc.c27 /* Set both PCLK0 and PCLK1 as HCLK/2 */ in soc_reset_hook()
/Zephyr-latest/dts/bindings/clock/
Dst,stm32-rcc.yaml16 Last, peripheral bus clocks (typically PCLK1, PCLK2) should be configured using matching
64 'PCLK/PCLK1/PCLK2' depending on the device). There is no need to add a second
Dst,stm32h7-rcc.yaml15 Last, bus clocks (typically HCLK, PCLK1, PCLK2) should be configured using matching
Dst,stm32h7rs-rcc.yaml15 Last, bus clocks (typically HCLK, PCLK1, PCLK2) should be configured using matching
Dst,stm32wba-rcc.yaml16 Last, peripheral bus clocks (typically PCLK1, PCLK2, PCLK7) should be configured using