1 /*
2  * SPDX-License-Identifier: Apache-2.0
3  *
4  * Copyright (c) 2020 Linumiz
5  * Author: Saravanan Sekar <saravanan@linumiz.com>
6  */
7 
8 #include <zephyr/init.h>
9 #include <zephyr/kernel.h>
10 
soc_reset_hook(void)11 void soc_reset_hook(void)
12 {
13 	SYS_UnlockReg();
14 
15 	/* system clock init */
16 	SystemInit();
17 
18 	/* Enable HXT clock (external XTAL 12MHz) */
19 	CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);
20 
21 	/* Wait for HXT clock ready */
22 	CLK_WaitClockReady(CLK_STATUS_HXTSTB_Msk);
23 
24 	/* Set core clock as PLL_FOUT source */
25 	CLK_SetCoreClock(FREQ_192MHZ);
26 
27 	/* Set both PCLK0 and PCLK1 as HCLK/2 */
28 	CLK->PCLKDIV = (CLK_PCLKDIV_APB0DIV_DIV2 | CLK_PCLKDIV_APB1DIV_DIV2);
29 
30 	SystemCoreClockUpdate();
31 
32 	SYS_LockReg();
33 }
34