| /Zephyr-latest/arch/arm64/core/ |
| D | early_mem_funcs.S | 34 and x8, x1, #0xff
36 mul x8, x8, x9
41 str x8, [x0], #8
59 orr x8, x1, x0
60 tst x8, #0x7
68 ldr x8, [x1], #8
71 str x8, [x0], #8
|
| D | userspace.S | 104 ldr x8, [sp, ___esf_t_x8_x9_OFFSET]
108 cmp x8, x9
112 mov x0, x8
113 ldr x8, =K_SYSCALL_BAD
117 ldr x9, [x9, x8, lsl #3]
|
| D | coredump.c | 29 uint64_t x8; member
82 arch_blk.r.x8 = esf->x8; in arch_coredump_info_dump()
|
| /Zephyr-latest/soc/cdns/xtensa_sample_controller/include/ |
| D | xtensa-sample-controller.ld | 27 iram0_1_seg : org = 0x40000178, len = 0x8
29 iram0_3_seg : org = 0x400001B8, len = 0x8
31 iram0_5_seg : org = 0x400001F8, len = 0x8
33 iram0_7_seg : org = 0x40000238, len = 0x8
35 iram0_9_seg : org = 0x40000278, len = 0x8
37 iram0_11_seg : org = 0x400002B8, len = 0x8
39 iram0_13_seg : org = 0x400002F8, len = 0x8
41 iram0_15_seg : org = 0x40000338, len = 0x8
216 _memmap_seg_dram1_0_end = ALIGN(0x8);
247 _memmap_seg_dram0_0_end = ALIGN(0x8);
[all …]
|
| /Zephyr-latest/boards/intel/niosv_g/ |
| D | niosv_g.dts | 30 reg = <0x90000 0x8 0x90008 0x8>;
34 reg = <0x90078 0x8>;
|
| /Zephyr-latest/boards/intel/niosv_m/ |
| D | niosv_m.dts | 30 reg = <0x90000 0x8 0x90008 0x8>;
34 reg = <0x90078 0x8>;
|
| /Zephyr-latest/tests/drivers/mbox/mbox_error_cases/boards/ |
| D | rzg3s_smarc_r9a08g045s33gbg_cm33.overlay | 27 reg = <0x62F01008 0x8>;
32 reg = <0x62F01018 0x8>;
37 reg = <0x62F01020 0x8>;
42 reg = <0x62F01028 0x8>;
|
| /Zephyr-latest/include/zephyr/arch/arm64/ |
| D | error.h | 27 register uint64_t x8 __asm__("x8") = reason_p; \
32 "r" (x8) \
|
| /Zephyr-latest/dts/arm/ambiq/ |
| D | ambiq_apollo3_blue.dtsi | 185 ambiq,pwrcfg = <&pwrcfg 0x8 0x80>;
196 ambiq,pwrcfg = <&pwrcfg 0x8 0x100>;
207 ambiq,pwrcfg = <&pwrcfg 0x8 0>;
218 ambiq,pwrcfg = <&pwrcfg 0x8 0x2>;
229 ambiq,pwrcfg = <&pwrcfg 0x8 0x4>;
240 ambiq,pwrcfg = <&pwrcfg 0x8 0x8>;
251 ambiq,pwrcfg = <&pwrcfg 0x8 0x10>;
262 ambiq,pwrcfg = <&pwrcfg 0x8 0x20>;
273 ambiq,pwrcfg = <&pwrcfg 0x8 0x40>;
284 ambiq,pwrcfg = <&pwrcfg 0x8 0x2>;
[all …]
|
| D | ambiq_apollo3p_blue.dtsi | 203 ambiq,pwrcfg = <&pwrcfg 0x8 0x80>;
214 ambiq,pwrcfg = <&pwrcfg 0x8 0x100>;
225 ambiq,pwrcfg = <&pwrcfg 0x8 0>;
236 ambiq,pwrcfg = <&pwrcfg 0x8 0x2>;
247 ambiq,pwrcfg = <&pwrcfg 0x8 0x4>;
258 ambiq,pwrcfg = <&pwrcfg 0x8 0x8>;
269 ambiq,pwrcfg = <&pwrcfg 0x8 0x10>;
280 ambiq,pwrcfg = <&pwrcfg 0x8 0x20>;
291 ambiq,pwrcfg = <&pwrcfg 0x8 0x40>;
302 ambiq,pwrcfg = <&pwrcfg 0x8 0x2>;
[all …]
|
| /Zephyr-latest/samples/boards/renesas/openamp_linux_zephyr/boards/ |
| D | rzg3s_smarc_r9a08g045s33gbg_cm33.overlay | 52 reg = <0x62F01008 0x8>;
57 reg = <0x62F01018 0x8>;
62 reg = <0x62F01020 0x8>;
67 reg = <0x62F01028 0x8>;
|
| /Zephyr-latest/tests/drivers/syscon/boards/ |
| D | qemu_cortex_a53.overlay | 14 reg = <0 0x47000000 0 0x8>;
22 reg = <0 0x47000000 0 0x8>;
|
| /Zephyr-latest/boards/shields/amg88xx/doc/ |
| D | index.rst | 10 individual thermopile elements arranged in an 8x8 matrix.
32 - `Adafruit AMG8833 8x8 Thermal Camera Sensor`_
37 :alt: Adafruit AMG8833 8x8 Thermal Camera Sensor
118 For the `Adafruit AMG8833 8x8 Thermal Camera Sensor`_ breakout board you can
122 `Adafruit AMG8833 8x8 Thermal Camera Sensor Pinouts`_ and the pin assignment
167 .. _`Adafruit AMG8833 8x8 Thermal Camera Sensor`: https://learn.adafruit.com/adafruit-amg8833-8x8-t…
168 .. _`Adafruit AMG8833 8x8 Thermal Camera Sensor Pinouts`: https://learn.adafruit.com/adafruit-amg88…
|
| /Zephyr-latest/dts/riscv/niosv/ |
| D | niosv-m.dtsi | 48 reg = <0x90000 0x8 0x90008 0x8>;
|
| D | niosv-g.dtsi | 48 reg = <0x90000 0x8 0x90008 0x8>;
|
| /Zephyr-latest/samples/sensor/amg88xx/ |
| D | README.rst | 5 Get temperature data from an AMG88XX 8x8 thermal camera sensor.
10 This sample application periodically reads the 8x8 temperature array from
|
| /Zephyr-latest/tests/subsys/storage/stream/stream_flash/ |
| D | unaligned_flush.overlay | 8 write-block-size = < 0x8 >;
|
| /Zephyr-latest/boards/snps/nsim/arc_v/ |
| D | rmx1xx.dtsi | 43 reg = <0x200bff8 0x8 0x2004000 0x8>;
|
| /Zephyr-latest/dts/riscv/microchip/ |
| D | microchip-miv.dtsi | 54 reg = <0x4400bff8 0x8 0x44004000 0x8>;
|
| /Zephyr-latest/drivers/sensor/infineon/dps310/ |
| D | Kconfig | 31 bool "x8"
55 bool "x8"
|
| /Zephyr-latest/soc/cdns/sample_controller32/include/ |
| D | xtensa-sample-controller32.ld | 51 iram0_1_seg : org = 0x40000178, len = 0x8
53 iram0_3_seg : org = 0x400001B8, len = 0x8
55 iram0_5_seg : org = 0x400001F8, len = 0x8
57 iram0_7_seg : org = 0x40000238, len = 0x8
59 iram0_9_seg : org = 0x40000278, len = 0x8
61 iram0_11_seg : org = 0x400002B8, len = 0x8
63 iram0_13_seg : org = 0x400002F8, len = 0x8
65 iram0_15_seg : org = 0x40000338, len = 0x8
186 _memmap_seg_dram1_0_end = ALIGN(0x8);
217 _memmap_seg_dram0_0_end = ALIGN(0x8);
|
| /Zephyr-latest/drivers/sensor/bosch/bme680/ |
| D | Kconfig | 32 bool "x8"
50 bool "x8"
68 bool "x8"
|
| /Zephyr-latest/dts/riscv/ |
| D | renode_riscv32_virt.dtsi | 56 reg = <0x200bff8 0x8 0x2004000 0x8>;
|
| /Zephyr-latest/dts/riscv/lowrisc/ |
| D | opentitan_earlgrey.dtsi | 49 reg = <0x40100110 0x8 0x40100118 0x8>;
|
| /Zephyr-latest/soc/andestech/ae350/common_linker/ |
| D | ram_start_nonzero.ld | 15 . = ABSOLUTE(.) ? . : . + 0x8;
|
