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/Zephyr-latest/scripts/coccinelle/
Dderef_null.cocci43 statement S1,S2;
47 if@p1 ((E == NULL && ...) || ...) S1 else S2
56 statement S1,S2,S3,S4;
64 ... when != if (...) S1 else S2
117 statement S1,S2,S3,S4;
125 ... when != if (...) S1 else S2
177 statement S1,S2,S3,S4;
185 ... when != if (...) S1 else S2
239 statement S1,S2;
243 if@p1 ((E == NULL && ...) || ...) S1 else S2
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Dmini_lock.cocci68 statement S1,S2;
77 when != if@pif (...) S2
/Zephyr-latest/boards/espressif/esp32s2_devkitc/doc/
Dindex.rst6 ESP32-S2-DevKitC is an entry-level development board. This board integrates complete Wi-Fi function…
8 Developers can either connect peripherals with jumper wires or mount ESP32-S2-DevKitC on a breadboa…
9 For more information, check `ESP32-S2-DevKitC`_.
14 ESP32-S2 is a highly integrated, low-power, single-core Wi-Fi Microcontroller SoC, designed to be s…
38 For more information, check the datasheet at `ESP32-S2 Datasheet`_ or the technical reference
39 manual at `ESP32-S2 Technical Reference Manual`_.
185 ESP32-S2 support on OpenOCD is available at `OpenOCD ESP32`_.
187 The following table shows the pin mapping between ESP32-S2 board and JTAG interface.
201 Further documentation can be obtained from the SoC vendor in `JTAG debugging for ESP32-S2`_.
222 .. _`ESP32-S2-DevKitC`: https://docs.espressif.com/projects/esp-idf/en/latest/esp32s2/hw-reference/…
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/Zephyr-latest/boards/infineon/cy8ckit_062s2_ai/doc/
Dindex.rst6 The PSOC 6 AI Evaluation Kit (CY8CKIT-062S2-AI) is a cost effective and small development kit that
20 For more information about the CY8C624ABZI-S2D44 MCU SoC and CY8CKIT-062S2-AI board:
24 - `CY8CKIT-062S2-AI Website`_
25 - `CY8CKIT-062S2-AI User Guide`_
26 - `CY8CKIT-062S2-AI Schematics`_
44 The CY8CKIT-062S2-AI board requires fetch binary files (e.g CM0+ prebuilt images).
66 The CY8CKIT-062S2-AI board includes an onboard programmer/debugger (`KitProg3`_)
139 .. _CY8CKIT-062S2-AI Website:
142 .. _CY8CKIT-062S2-AI User Guide:
145 .. _CY8CKIT-062S2-AI Schematics:
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/Zephyr-latest/boards/espressif/esp32s2_saola/doc/
Dindex.rst6 ESP32-S2-Saola is a small-sized ESP32-S2 based development board produced by Espressif.
8 Developers can either connect peripherals with jumper wires or mount ESP32-S2-Saola on a breadboard.
14 ESP32-S2 is a highly integrated, low-power, single-core Wi-Fi Microcontroller SoC, designed to be s…
38 For more information, check the datasheet at `ESP32-S2 Datasheet`_ or the technical reference
39 manual at `ESP32-S2 Technical Reference Manual`_.
185 ESP32-S2 support on OpenOCD is available at `OpenOCD ESP32`_.
187 The following table shows the pin mapping between ESP32-S2 board and JTAG interface.
201 Further documentation can be obtained from the SoC vendor in `JTAG debugging for ESP32-S2`_.
223 .. _`ESP32-S2 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-s2_data…
224 .. _`ESP32-S2 Technical Reference Manual`: https://espressif.com/sites/default/files/documentation/…
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/Zephyr-latest/boards/wemos/esp32s2_lolin_mini/
DKconfig.esp32s2_lolin_mini1 # ESP32S2 LOLIN S2 MINI board configuration
/Zephyr-latest/doc/services/smf/
Dindex.rst56 enum demo_state { S0, S1, S2 };
61 [S2] = SMF_CREATE_STATE(s2_entry, s2_run, s2_exit, NULL, NULL)
66 enum demo_state { S0, S1, S2 };
71 [S2] = SMF_CREATE_STATE(s2_entry, s2_run, s2_exit, parent_s12, NULL)
76 from parent state S0 to child state S2::
78 enum demo_state { S0, S1, S2 };
84 [S0] = SMF_CREATE_STATE(s0_entry, s0_run, s0_exit, NULL, demo_states[S2]),
86 [S2] = SMF_CREATE_STATE(s2_entry, s2_run, s2_exit, demo_states[S0], NULL)
185 enum demo_state { S0, S1, S2 };
212 smf_set_state(SMF_CTX(&s_obj), &demo_states[S2]);
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/Zephyr-latest/samples/boards/espressif/xt_wdt/
DREADME.rst16 9 KHz for S2).
24 * ESP32-S2
/Zephyr-latest/samples/boards/espressif/spiram_test/
DREADME.rst20 * ESP32-S2
/Zephyr-latest/soc/espressif/esp32s2/
DKconfig.soc8 ESP32-S2 Series
/Zephyr-latest/boards/infineon/cy8ckit_062s2_ai/
Dcy8ckit_062s2_ai.dts13 model = "CY8CKIT-062S2-AI PSOC 6 AI Evaluation Kit";
/Zephyr-latest/scripts/coredump/gdbstubs/arch/
Drisc_v.py35 S2 = 18 variable in RegNum
/Zephyr-latest/boards/wemos/esp32s2_lolin_mini/doc/
Dindex.rst6 ESP32-S2 is a highly integrated, low-power, single-core Wi-Fi Microcontroller SoC, designed to be s…
/Zephyr-latest/boards/adi/apard32690/
Dapard32690_max32690_m4.dts45 label = "S2";
/Zephyr-latest/boards/franzininho/esp32s2_franzininho/doc/
Dindex.rst6 Franzininho is an educational development board based on ESP32-S2 which is a highly integrated, low…
/Zephyr-latest/boards/renesas/voice_ra4e1/doc/
Dindex.rst36 - Buttons: One RESET button (S2), and one USER button (S1).
/Zephyr-latest/boards/element14/warp7/doc/
Dindex.rst25 - S2 - User Defined button (ENET1_RD1/GPIO7_IO1 signal)
90 | S2 | ENET1_RD1/GPIO7_IO1 | SW0 |
/Zephyr-latest/dts/arm/silabs/
Defr32bg2x.dtsi123 * managed by sl_power_manager on S2 devices.
Defr32mg24.dtsi145 * managed by sl_power_manager on S2 devices.
Defr32xg23.dtsi155 * managed by sl_power_manager on S2 devices.
/Zephyr-latest/boards/ezurio/bl5340_dvk/
Dbl5340_dvk_nrf5340_cpuapp_common.dtsi40 label = "Push button switch 2 (S2)";
/Zephyr-latest/boards/ezurio/bt610/doc/
Dbt610.rst214 | AIN2 | S2 |
304 | THERM2 | S2 |
/Zephyr-latest/dts/arm/silabs/xg29/
Dxg29.dtsi152 * managed by sl_power_manager on S2 devices.
/Zephyr-latest/doc/connectivity/bluetooth/
Dbluetooth-ctlr-arch.rst358 2 Mbps and Coded PHY S2/S8 Long Range Bluetooth Low Energy technology
/Zephyr-latest/boards/microchip/mec172xevb_assy6906/doc/
Dindex.rst359 .. note:: When west process started press Reset button ``S2`` and do not release it

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