Home
last modified time | relevance | path

Searched refs:alignment (Results 1 – 25 of 172) sorted by relevance

1234567

/Zephyr-latest/dts/xtensa/intel/
Dintel_adsp_cavs.dtsi18 dma-buf-size-alignment = <4>;
19 dma-copy-alignment = <4>;
31 dma-buf-size-alignment = <4>;
32 dma-copy-alignment = <4>;
42 dma-buf-addr-alignment = <128>;
43 dma-buf-size-alignment = <32>;
44 dma-copy-alignment = <32>;
54 dma-buf-addr-alignment = <128>;
55 dma-buf-size-alignment = <32>;
56 dma-copy-alignment = <32>;
[all …]
Dintel_adsp_ace15_mtpm.dtsi483 dma-buf-addr-alignment = <128>;
484 dma-buf-size-alignment = <32>;
485 dma-copy-alignment = <16>;
496 dma-buf-addr-alignment = <128>;
497 dma-buf-size-alignment = <32>;
498 dma-copy-alignment = <16>;
509 dma-buf-addr-alignment = <128>;
510 dma-buf-size-alignment = <32>;
511 dma-copy-alignment = <16>;
524 dma-buf-addr-alignment = <128>;
[all …]
Dintel_adsp_ace20_lnl.dtsi388 dma-buf-addr-alignment = <128>;
389 dma-buf-size-alignment = <32>;
390 dma-copy-alignment = <16>;
403 dma-buf-addr-alignment = <128>;
404 dma-buf-size-alignment = <32>;
405 dma-copy-alignment = <16>;
426 dma-buf-addr-alignment = <128>;
427 dma-buf-size-alignment = <32>;
428 dma-copy-alignment = <16>;
439 dma-buf-addr-alignment = <128>;
[all …]
/Zephyr-latest/boards/nordic/nrf54h20dk/
Dnrf54h20dk_nrf54h20-ipc_conf.dtsi12 dcache-alignment = <32>;
20 dcache-alignment = <32>;
27 dcache-alignment = <32>;
36 dcache-alignment = <32>;
44 dcache-alignment = <32>;
52 dcache-alignment = <32>;
60 dcache-alignment = <32>;
/Zephyr-latest/boards/nordic/nrf9280pdk/
Dnrf9280pdk_nrf9280-ipc_conf.dtsi12 dcache-alignment = <32>;
20 dcache-alignment = <32>;
27 dcache-alignment = <32>;
36 dcache-alignment = <32>;
44 dcache-alignment = <32>;
52 dcache-alignment = <32>;
/Zephyr-latest/soc/espressif/esp32/
Dgdbstub.c22 .alignment = 4,
29 .alignment = 4,
36 .alignment = 4,
43 .alignment = 4,
50 .alignment = 4,
57 .alignment = 4,
64 .alignment = 4,
71 .alignment = 4,
78 .alignment = 4,
88 .alignment = 4,
[all …]
/Zephyr-latest/scripts/build/
Dgen_iter_sections.py19 def gen_ld(filepath: str, items: list, alignment: int):
25 def gen_cmake(filepath: str, items: list, alignment: int):
68 gen_ld(args.ld_output, items, args.alignment)
69 gen_cmake(args.cmake_output, items, args.alignment)
/Zephyr-latest/include/zephyr/fs/
Dlittlefs.h86 #define FS_LITTLEFS_DECLARE_CUSTOM_CONFIG(name, alignment, read_sz, prog_sz, cache_sz, \ argument
88 static uint8_t __aligned(alignment) name ## _read_buffer[cache_sz]; \
89 static uint8_t __aligned(alignment) name ## _prog_buffer[cache_sz]; \
/Zephyr-latest/arch/arm/core/mpu/
DKconfig16 Minimum size (and alignment) of an ARM MPU region. Use this
17 symbol to guarantee minimum size and alignment of MPU regions.
18 A minimum 4-byte alignment is enforced in ARM builds without
34 Minimum size (and alignment when applicable) of an ARM MPU
59 for respect alignment. But that needs carefully configure MPU region
67 it should consume less alignment memory. Although this alignment
/Zephyr-latest/subsys/ipc/ipc_service/lib/
DKconfig15 int "VRINGs alignment"
19 Static VRINGs alignment. This should take into account the cache line
20 alignment if the cache is enabled.
/Zephyr-latest/arch/arm64/core/cortex_r/
DKconfig16 Minimum size (and alignment) of an ARM MPU region. Use this
17 symbol to guarantee minimum size and alignment of MPU regions.
18 A minimum 4-byte alignment is enforced in ARM builds without
/Zephyr-latest/modules/littlefs/
Dzephyr_lfs_config.h93 static inline uint32_t lfs_aligndown(uint32_t a, uint32_t alignment) in lfs_aligndown() argument
95 return a - (a % alignment); in lfs_aligndown()
98 static inline uint32_t lfs_alignup(uint32_t a, uint32_t alignment) in lfs_alignup() argument
100 return lfs_aligndown(a + alignment-1, alignment); in lfs_alignup()
/Zephyr-latest/subsys/fs/ext2/
DKconfig48 int "Ext2 superblock alignment"
51 Some SD host controllers require alignment of their data buffers
53 this value if they require alignment. This represents the alignment
/Zephyr-latest/tests/drivers/display/display_read_write/
DKconfig14 int "Display buffer memory alignment"
17 Specific display buffer alignment.
/Zephyr-latest/arch/arm/core/cortex_m/
Drelay_vector_table.ld11 * Therefore, vector_relay_table must respect the alignment requirements
21 * exception entries in the vector table. The minimum alignment of 32 words
23 * For more than 16 HW interrupts, we adjust the alignment by rounding up
/Zephyr-latest/drivers/mspi/
DKconfig.ambiq24 int "byte alignment of the MSPI buffer"
28 This option specifies the mspi buffer alignment
/Zephyr-latest/doc/kernel/usermode/
Dmpu_stack_objects.rst15 implications for placement are directly attributed to the alignment
37 memory. These constraints include determining the alignment of the stack and
43 can include alignment of beginning and end addresses, sizes of allocations,
54 start and end addresses require 32 byte alignment. An example of this kind of
61 Size and alignment constraints may result in stack allocations being larger
/Zephyr-latest/lib/libc/common/source/stdlib/
Dmalloc.c156 void *aligned_alloc(size_t alignment, size_t size) in aligned_alloc() argument
161 alignment, in aligned_alloc()
187 void *memalign(size_t alignment, size_t size) in memalign() argument
189 return aligned_alloc(alignment, size); in memalign()
/Zephyr-latest/drivers/sdhc/
DKconfig33 Some SD host controllers require alignment of their data buffers
35 this value if they require alignment. This represents the alignment
/Zephyr-latest/include/zephyr/arch/arm/cortex_a_r/scripts/
Dapp_data_alignment.ld7 /* Set initial alignment to the 32 byte minimum for all MPUs */
/Zephyr-latest/include/zephyr/arch/arm/cortex_r/scripts/
Dapp_data_alignment.ld7 /* Set initial alignment to the 32 byte minimum for all MPUs */
/Zephyr-latest/include/zephyr/arch/common/
Dapp_data_alignment.ld7 /* Set initial alignment to the 32 byte minimum for all MPUs */
/Zephyr-latest/arch/arm/core/
Dvector_table.ld11 * exc_vector_table must respect the alignment requirements of VTOR.TBLOFF
30 * exception entries in the vector table. The minimum alignment of 32 words
32 * For more than 16 HW interrupts, we adjust the alignment by rounding up
/Zephyr-latest/lib/net_buf/
DKconfig53 int "Network buffer alignment restriction"
59 Default value of 0 means the alignment will be the size of a void pointer,
60 any other value will force the alignment of a net buffer in bytes.
/Zephyr-latest/subsys/mgmt/mcumgr/grp/img_mgmt_client/
DKconfig24 int "MCUmgr upload data alignment size"
27 Change default value when platform needs different data alignment.

1234567