1# Memory Protection Unit (MPU) configuration options
2
3# Copyright (c) 2017 Linaro Limited
4# SPDX-License-Identifier: Apache-2.0
5
6if CPU_HAS_MPU
7
8config ARM_MPU_REGION_MIN_ALIGN_AND_SIZE
9	int
10	default 256 if ARM_MPU && ARMV6_M_ARMV8_M_BASELINE && !ARMV8_M_BASELINE
11	default 128 if ARM_MPU && FPU_SHARING && MPU_STACK_GUARD
12	default 64 if ARM_MPU && AARCH32_ARMV8_R
13	default 32 if ARM_MPU
14	default 4
15	help
16	  Minimum size (and alignment) of an ARM MPU region. Use this
17	  symbol to guarantee minimum size and alignment of MPU regions.
18	  A minimum 4-byte alignment is enforced in ARM builds without
19	  support for Memory Protection.
20
21if ARM_MPU
22
23config MPU_STACK_GUARD
24	bool "Thread Stack Guards"
25	help
26	  Enable Thread Stack Guards via MPU
27
28config MPU_STACK_GUARD_MIN_SIZE_FLOAT
29	int
30	depends on MPU_STACK_GUARD
31	depends on FPU_SHARING
32	default 128
33	help
34	  Minimum size (and alignment when applicable) of an ARM MPU
35	  region, which guards the stack of a thread that is using the
36	  Floating Point (FP) context. The width of the guard is set to
37	  128, to accommodate the length of a Cortex-M exception stack
38	  frame when the floating point context is active. The FP context
39	  is only stacked in sharing FP registers mode, therefore, the
40	  option is applicable only when FPU_SHARING is selected.
41
42config MPU_ALLOW_FLASH_WRITE
43	bool "Add MPU access to write to flash"
44	help
45	  Enable this to allow MPU RWX access to flash memory
46
47config MPU_DISABLE_BACKGROUND_MAP
48	bool "Disables the default background address map"
49	help
50	  Enable this to turn off the default background MPU address map. Your
51	  SoC definition should likely provide its own custom MPU regions.
52
53config CUSTOM_SECTION_ALIGN
54	bool "Custom Section Align"
55	help
56	  MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT(ARMv7-M) sometimes cause memory
57	  wasting in linker scripts defined memory sections. Use this symbol
58	  to guarantee user custom section align size to avoid more memory used
59	  for respect alignment. But that needs carefully configure MPU region
60	  and sub-regions(ARMv7-M) to cover this feature.
61
62config CUSTOM_SECTION_MIN_ALIGN_SIZE
63	int "Custom Section Align Size"
64	default 32
65	help
66	  Custom align size of memory section in linker scripts. Usually
67	  it should consume less alignment memory. Although this alignment
68	  size is configured by users, it must also respect the power of
69	  two regulation if hardware requires.
70
71endif # ARM_MPU
72
73endif # CPU_HAS_MPU
74