1/*
2 * Copyright (c) 2022 Intel Corporation
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <xtensa/xtensa.dtsi>
8
9/ {
10	soc {
11		lpgpdma0: dma@7c000 {
12			compatible = "intel,adsp-gpdma";
13			#dma-cells = <1>;
14			reg = <0x0007c000 0x1000>;
15			shim = <0x00078400 0x100>;
16			interrupts = <0x10 0 0>;
17			interrupt-parent = <&cavs_intc3>;
18			dma-buf-size-alignment = <4>;
19			dma-copy-alignment = <4>;
20
21			status = "okay";
22		};
23
24		lpgpdma1: dma@7d000 {
25			compatible = "intel,adsp-gpdma";
26			#dma-cells = <1>;
27			reg = <0x0007d000 0x1000>;
28			shim = <0x00078500 0x100>;
29			interrupts = <0x0F 0 0>;
30			interrupt-parent = <&cavs_intc3>;
31			dma-buf-size-alignment = <4>;
32			dma-copy-alignment = <4>;
33
34			status = "okay";
35		};
36
37		hda_link_out: dma@72400 {
38			compatible = "intel,adsp-hda-link-out";
39			#dma-cells = <1>;
40			reg = <0x00072400 0x20>;
41			dma-channels = <4>;
42			dma-buf-addr-alignment = <128>;
43			dma-buf-size-alignment = <32>;
44			dma-copy-alignment = <32>;
45
46			status = "okay";
47		};
48
49		hda_link_in: dma@72600 {
50			compatible = "intel,adsp-hda-link-in";
51			#dma-cells = <1>;
52			reg = <0x00072600 0x20>;
53			dma-channels = <4>;
54			dma-buf-addr-alignment = <128>;
55			dma-buf-size-alignment = <32>;
56			dma-copy-alignment = <32>;
57
58			status = "okay";
59		};
60
61		hda_host_out: dma@72800 {
62			compatible = "intel,adsp-hda-host-out";
63			#dma-cells = <1>;
64			reg = <0x00072800 0x40>;
65			dma-channels = <9>;
66			dma-buf-addr-alignment = <128>;
67			dma-buf-size-alignment = <32>;
68			dma-copy-alignment = <32>;
69			interrupts = <0x10 0 0>;
70			interrupt-parent = <&cavs_intc1>;
71			status = "okay";
72		};
73
74		hda_host_in: dma@72c00 {
75			compatible = "intel,adsp-hda-host-in";
76			#dma-cells = <1>;
77			reg = <0x00072c00 0x40>;
78			dma-channels = <7>;
79			dma-buf-addr-alignment = <128>;
80			dma-buf-size-alignment = <32>;
81			dma-copy-alignment = <32>;
82			interrupts = <0x0 0 0>;
83			interrupt-parent = <&cavs_intc1>;
84			status = "okay";
85		};
86	};
87};
88