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Searched refs:TIM_CR2_MMS2_Pos (Results 1 – 25 of 174) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h5214 #define TIM_CR2_MMS2_Pos (20U) macro
5215 #define TIM_CR2_MMS2_Msk (0xFUL << TIM_CR2_MMS2_Pos) /*!< 0x00F00000 */
5217 #define TIM_CR2_MMS2_0 (0x1UL << TIM_CR2_MMS2_Pos) /*!< 0x00100000 */
5218 #define TIM_CR2_MMS2_1 (0x2UL << TIM_CR2_MMS2_Pos) /*!< 0x00200000 */
5219 #define TIM_CR2_MMS2_2 (0x4UL << TIM_CR2_MMS2_Pos) /*!< 0x00400000 */
5220 #define TIM_CR2_MMS2_3 (0x8UL << TIM_CR2_MMS2_Pos) /*!< 0x00800000 */
Dstm32c031xx.h5377 #define TIM_CR2_MMS2_Pos (20U) macro
5378 #define TIM_CR2_MMS2_Msk (0xFUL << TIM_CR2_MMS2_Pos) /*!< 0x00F00000 */
5380 #define TIM_CR2_MMS2_0 (0x1UL << TIM_CR2_MMS2_Pos) /*!< 0x00100000 */
5381 #define TIM_CR2_MMS2_1 (0x2UL << TIM_CR2_MMS2_Pos) /*!< 0x00200000 */
5382 #define TIM_CR2_MMS2_2 (0x4UL << TIM_CR2_MMS2_Pos) /*!< 0x00400000 */
5383 #define TIM_CR2_MMS2_3 (0x8UL << TIM_CR2_MMS2_Pos) /*!< 0x00800000 */
Dstm32c071xx.h5881 #define TIM_CR2_MMS2_Pos (20U) macro
5882 #define TIM_CR2_MMS2_Msk (0xFUL << TIM_CR2_MMS2_Pos) /*!< 0x00F00000 */
5884 #define TIM_CR2_MMS2_0 (0x1UL << TIM_CR2_MMS2_Pos) /*!< 0x00100000 */
5885 #define TIM_CR2_MMS2_1 (0x2UL << TIM_CR2_MMS2_Pos) /*!< 0x00200000 */
5886 #define TIM_CR2_MMS2_2 (0x4UL << TIM_CR2_MMS2_Pos) /*!< 0x00400000 */
5887 #define TIM_CR2_MMS2_3 (0x8UL << TIM_CR2_MMS2_Pos) /*!< 0x00800000 */
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h5826 #define TIM_CR2_MMS2_Pos (20U) macro
5827 #define TIM_CR2_MMS2_Msk (0xFUL << TIM_CR2_MMS2_Pos) /*!< 0x00F00000 */
5829 #define TIM_CR2_MMS2_0 (0x1UL << TIM_CR2_MMS2_Pos) /*!< 0x00100000 */
5830 #define TIM_CR2_MMS2_1 (0x2UL << TIM_CR2_MMS2_Pos) /*!< 0x00200000 */
5831 #define TIM_CR2_MMS2_2 (0x4UL << TIM_CR2_MMS2_Pos) /*!< 0x00400000 */
5832 #define TIM_CR2_MMS2_3 (0x8UL << TIM_CR2_MMS2_Pos) /*!< 0x00800000 */
Dstm32g050xx.h5887 #define TIM_CR2_MMS2_Pos (20U) macro
5888 #define TIM_CR2_MMS2_Msk (0xFUL << TIM_CR2_MMS2_Pos) /*!< 0x00F00000 */
5890 #define TIM_CR2_MMS2_0 (0x1UL << TIM_CR2_MMS2_Pos) /*!< 0x00100000 */
5891 #define TIM_CR2_MMS2_1 (0x2UL << TIM_CR2_MMS2_Pos) /*!< 0x00200000 */
5892 #define TIM_CR2_MMS2_2 (0x4UL << TIM_CR2_MMS2_Pos) /*!< 0x00400000 */
5893 #define TIM_CR2_MMS2_3 (0x8UL << TIM_CR2_MMS2_Pos) /*!< 0x00800000 */
Dstm32g070xx.h6026 #define TIM_CR2_MMS2_Pos (20U) macro
6027 #define TIM_CR2_MMS2_Msk (0xFUL << TIM_CR2_MMS2_Pos) /*!< 0x00F00000 */
6029 #define TIM_CR2_MMS2_0 (0x1UL << TIM_CR2_MMS2_Pos) /*!< 0x00100000 */
6030 #define TIM_CR2_MMS2_1 (0x2UL << TIM_CR2_MMS2_Pos) /*!< 0x00200000 */
6031 #define TIM_CR2_MMS2_2 (0x4UL << TIM_CR2_MMS2_Pos) /*!< 0x00400000 */
6032 #define TIM_CR2_MMS2_3 (0x8UL << TIM_CR2_MMS2_Pos) /*!< 0x00800000 */
Dstm32g031xx.h6090 #define TIM_CR2_MMS2_Pos (20U) macro
6091 #define TIM_CR2_MMS2_Msk (0xFUL << TIM_CR2_MMS2_Pos) /*!< 0x00F00000 */
6093 #define TIM_CR2_MMS2_0 (0x1UL << TIM_CR2_MMS2_Pos) /*!< 0x00100000 */
6094 #define TIM_CR2_MMS2_1 (0x2UL << TIM_CR2_MMS2_Pos) /*!< 0x00200000 */
6095 #define TIM_CR2_MMS2_2 (0x4UL << TIM_CR2_MMS2_Pos) /*!< 0x00400000 */
6096 #define TIM_CR2_MMS2_3 (0x8UL << TIM_CR2_MMS2_Pos) /*!< 0x00800000 */
Dstm32g041xx.h6394 #define TIM_CR2_MMS2_Pos (20U) macro
6395 #define TIM_CR2_MMS2_Msk (0xFUL << TIM_CR2_MMS2_Pos) /*!< 0x00F00000 */
6397 #define TIM_CR2_MMS2_0 (0x1UL << TIM_CR2_MMS2_Pos) /*!< 0x00100000 */
6398 #define TIM_CR2_MMS2_1 (0x2UL << TIM_CR2_MMS2_Pos) /*!< 0x00200000 */
6399 #define TIM_CR2_MMS2_2 (0x4UL << TIM_CR2_MMS2_Pos) /*!< 0x00400000 */
6400 #define TIM_CR2_MMS2_3 (0x8UL << TIM_CR2_MMS2_Pos) /*!< 0x00800000 */
Dstm32g051xx.h6489 #define TIM_CR2_MMS2_Pos (20U) macro
6490 #define TIM_CR2_MMS2_Msk (0xFUL << TIM_CR2_MMS2_Pos) /*!< 0x00F00000 */
6492 #define TIM_CR2_MMS2_0 (0x1UL << TIM_CR2_MMS2_Pos) /*!< 0x00100000 */
6493 #define TIM_CR2_MMS2_1 (0x2UL << TIM_CR2_MMS2_Pos) /*!< 0x00200000 */
6494 #define TIM_CR2_MMS2_2 (0x4UL << TIM_CR2_MMS2_Pos) /*!< 0x00400000 */
6495 #define TIM_CR2_MMS2_3 (0x8UL << TIM_CR2_MMS2_Pos) /*!< 0x00800000 */
Dstm32g061xx.h6793 #define TIM_CR2_MMS2_Pos (20U) macro
6794 #define TIM_CR2_MMS2_Msk (0xFUL << TIM_CR2_MMS2_Pos) /*!< 0x00F00000 */
6796 #define TIM_CR2_MMS2_0 (0x1UL << TIM_CR2_MMS2_Pos) /*!< 0x00100000 */
6797 #define TIM_CR2_MMS2_1 (0x2UL << TIM_CR2_MMS2_Pos) /*!< 0x00200000 */
6798 #define TIM_CR2_MMS2_2 (0x4UL << TIM_CR2_MMS2_Pos) /*!< 0x00400000 */
6799 #define TIM_CR2_MMS2_3 (0x8UL << TIM_CR2_MMS2_Pos) /*!< 0x00800000 */
Dstm32g071xx.h6873 #define TIM_CR2_MMS2_Pos (20U) macro
6874 #define TIM_CR2_MMS2_Msk (0xFUL << TIM_CR2_MMS2_Pos) /*!< 0x00F00000 */
6876 #define TIM_CR2_MMS2_0 (0x1UL << TIM_CR2_MMS2_Pos) /*!< 0x00100000 */
6877 #define TIM_CR2_MMS2_1 (0x2UL << TIM_CR2_MMS2_Pos) /*!< 0x00200000 */
6878 #define TIM_CR2_MMS2_2 (0x4UL << TIM_CR2_MMS2_Pos) /*!< 0x00400000 */
6879 #define TIM_CR2_MMS2_3 (0x8UL << TIM_CR2_MMS2_Pos) /*!< 0x00800000 */
Dstm32g081xx.h7177 #define TIM_CR2_MMS2_Pos (20U) macro
7178 #define TIM_CR2_MMS2_Msk (0xFUL << TIM_CR2_MMS2_Pos) /*!< 0x00F00000 */
7180 #define TIM_CR2_MMS2_0 (0x1UL << TIM_CR2_MMS2_Pos) /*!< 0x00100000 */
7181 #define TIM_CR2_MMS2_1 (0x2UL << TIM_CR2_MMS2_Pos) /*!< 0x00200000 */
7182 #define TIM_CR2_MMS2_2 (0x4UL << TIM_CR2_MMS2_Pos) /*!< 0x00400000 */
7183 #define TIM_CR2_MMS2_3 (0x8UL << TIM_CR2_MMS2_Pos) /*!< 0x00800000 */
Dstm32g0b0xx.h7206 #define TIM_CR2_MMS2_Pos (20U) macro
7207 #define TIM_CR2_MMS2_Msk (0xFUL << TIM_CR2_MMS2_Pos) /*!< 0x00F00000 */
7209 #define TIM_CR2_MMS2_0 (0x1UL << TIM_CR2_MMS2_Pos) /*!< 0x00100000 */
7210 #define TIM_CR2_MMS2_1 (0x2UL << TIM_CR2_MMS2_Pos) /*!< 0x00200000 */
7211 #define TIM_CR2_MMS2_2 (0x4UL << TIM_CR2_MMS2_Pos) /*!< 0x00400000 */
7212 #define TIM_CR2_MMS2_3 (0x8UL << TIM_CR2_MMS2_Pos) /*!< 0x00800000 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h6608 #define TIM_CR2_MMS2_Pos (20U) macro
6609 #define TIM_CR2_MMS2_Msk (0xFUL << TIM_CR2_MMS2_Pos) /*!< 0x00F00000 */
6611 #define TIM_CR2_MMS2_0 (0x1UL << TIM_CR2_MMS2_Pos) /*!< 0x00100000 */
6612 #define TIM_CR2_MMS2_1 (0x2UL << TIM_CR2_MMS2_Pos) /*!< 0x00200000 */
6613 #define TIM_CR2_MMS2_2 (0x4UL << TIM_CR2_MMS2_Pos) /*!< 0x00400000 */
6614 #define TIM_CR2_MMS2_3 (0x8UL << TIM_CR2_MMS2_Pos) /*!< 0x00800000 */
Dstm32f318xx.h6595 #define TIM_CR2_MMS2_Pos (20U) macro
6596 #define TIM_CR2_MMS2_Msk (0xFUL << TIM_CR2_MMS2_Pos) /*!< 0x00F00000 */
6598 #define TIM_CR2_MMS2_0 (0x1UL << TIM_CR2_MMS2_Pos) /*!< 0x00100000 */
6599 #define TIM_CR2_MMS2_1 (0x2UL << TIM_CR2_MMS2_Pos) /*!< 0x00200000 */
6600 #define TIM_CR2_MMS2_2 (0x4UL << TIM_CR2_MMS2_Pos) /*!< 0x00400000 */
6601 #define TIM_CR2_MMS2_3 (0x8UL << TIM_CR2_MMS2_Pos) /*!< 0x00800000 */
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h8735 #define TIM_CR2_MMS2_Pos (20U) macro
8736 #define TIM_CR2_MMS2_Msk (0xFUL << TIM_CR2_MMS2_Pos) /*!< 0x00F00000 */
8738 #define TIM_CR2_MMS2_0 (0x1UL << TIM_CR2_MMS2_Pos) /*!< 0x00100000 */
8739 #define TIM_CR2_MMS2_1 (0x2UL << TIM_CR2_MMS2_Pos) /*!< 0x00200000 */
8740 #define TIM_CR2_MMS2_2 (0x4UL << TIM_CR2_MMS2_Pos) /*!< 0x00400000 */
8741 #define TIM_CR2_MMS2_3 (0x8UL << TIM_CR2_MMS2_Pos) /*!< 0x00800000 */
Dstm32wle5xx.h8735 #define TIM_CR2_MMS2_Pos (20U) macro
8736 #define TIM_CR2_MMS2_Msk (0xFUL << TIM_CR2_MMS2_Pos) /*!< 0x00F00000 */
8738 #define TIM_CR2_MMS2_0 (0x1UL << TIM_CR2_MMS2_Pos) /*!< 0x00100000 */
8739 #define TIM_CR2_MMS2_1 (0x2UL << TIM_CR2_MMS2_Pos) /*!< 0x00200000 */
8740 #define TIM_CR2_MMS2_2 (0x4UL << TIM_CR2_MMS2_Pos) /*!< 0x00400000 */
8741 #define TIM_CR2_MMS2_3 (0x8UL << TIM_CR2_MMS2_Pos) /*!< 0x00800000 */
/hal_stm32-latest/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h8321 #define TIM_CR2_MMS2_Pos (20U) macro
8322 #define TIM_CR2_MMS2_Msk (0xFUL << TIM_CR2_MMS2_Pos) /*!< 0x00F00000…
8324 #define TIM_CR2_MMS2_0 (0x1UL << TIM_CR2_MMS2_Pos) /*!< 0x00100000…
8325 #define TIM_CR2_MMS2_1 (0x2UL << TIM_CR2_MMS2_Pos) /*!< 0x00200000…
8326 #define TIM_CR2_MMS2_2 (0x4UL << TIM_CR2_MMS2_Pos) /*!< 0x00400000…
8327 #define TIM_CR2_MMS2_3 (0x8UL << TIM_CR2_MMS2_Pos) /*!< 0x00800000…
/hal_stm32-latest/stm32cube/stm32u0xx/soc/
Dstm32u031xx.h7266 #define TIM_CR2_MMS2_Pos (20U) macro
7267 #define TIM_CR2_MMS2_Msk (0xFUL << TIM_CR2_MMS2_Pos) /*!< 0x00F00000 */
7269 #define TIM_CR2_MMS2_0 (0x1UL << TIM_CR2_MMS2_Pos) /*!< 0x00100000 */
7270 #define TIM_CR2_MMS2_1 (0x2UL << TIM_CR2_MMS2_Pos) /*!< 0x00200000 */
7271 #define TIM_CR2_MMS2_2 (0x4UL << TIM_CR2_MMS2_Pos) /*!< 0x00400000 */
7272 #define TIM_CR2_MMS2_3 (0x8UL << TIM_CR2_MMS2_Pos) /*!< 0x00800000 */
Dstm32u083xx.h8203 #define TIM_CR2_MMS2_Pos (20U) macro
8204 #define TIM_CR2_MMS2_Msk (0xFUL << TIM_CR2_MMS2_Pos) /*!< 0x00F00000 */
8206 #define TIM_CR2_MMS2_0 (0x1UL << TIM_CR2_MMS2_Pos) /*!< 0x00100000 */
8207 #define TIM_CR2_MMS2_1 (0x2UL << TIM_CR2_MMS2_Pos) /*!< 0x00200000 */
8208 #define TIM_CR2_MMS2_2 (0x4UL << TIM_CR2_MMS2_Pos) /*!< 0x00400000 */
8209 #define TIM_CR2_MMS2_3 (0x8UL << TIM_CR2_MMS2_Pos) /*!< 0x00800000 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/
Dstm32wb50xx.h8932 #define TIM_CR2_MMS2_Pos (20U) macro
8933 #define TIM_CR2_MMS2_Msk (0xFUL << TIM_CR2_MMS2_Pos) /*!< 0x00F00000 */
8935 #define TIM_CR2_MMS2_0 (0x1U << TIM_CR2_MMS2_Pos) /*!< 0x00100000 */
8936 #define TIM_CR2_MMS2_1 (0x2U << TIM_CR2_MMS2_Pos) /*!< 0x00200000 */
8937 #define TIM_CR2_MMS2_2 (0x4U << TIM_CR2_MMS2_Pos) /*!< 0x00400000 */
8938 #define TIM_CR2_MMS2_3 (0x8U << TIM_CR2_MMS2_Pos) /*!< 0x00800000 */
Dstm32wb1mxx.h8955 #define TIM_CR2_MMS2_Pos (20U) macro
8956 #define TIM_CR2_MMS2_Msk (0xFUL << TIM_CR2_MMS2_Pos) /*!< 0x00F00000 */
8958 #define TIM_CR2_MMS2_0 (0x1U << TIM_CR2_MMS2_Pos) /*!< 0x00100000 */
8959 #define TIM_CR2_MMS2_1 (0x2U << TIM_CR2_MMS2_Pos) /*!< 0x00200000 */
8960 #define TIM_CR2_MMS2_2 (0x4U << TIM_CR2_MMS2_Pos) /*!< 0x00400000 */
8961 #define TIM_CR2_MMS2_3 (0x8U << TIM_CR2_MMS2_Pos) /*!< 0x00800000 */
Dstm32wb30xx.h8928 #define TIM_CR2_MMS2_Pos (20U) macro
8929 #define TIM_CR2_MMS2_Msk (0xFUL << TIM_CR2_MMS2_Pos) /*!< 0x00F00000 */
8931 #define TIM_CR2_MMS2_0 (0x1U << TIM_CR2_MMS2_Pos) /*!< 0x00100000 */
8932 #define TIM_CR2_MMS2_1 (0x2U << TIM_CR2_MMS2_Pos) /*!< 0x00200000 */
8933 #define TIM_CR2_MMS2_2 (0x4U << TIM_CR2_MMS2_Pos) /*!< 0x00400000 */
8934 #define TIM_CR2_MMS2_3 (0x8U << TIM_CR2_MMS2_Pos) /*!< 0x00800000 */
/hal_stm32-latest/stm32cube/stm32wbxx/soc/Include/
Dstm32wb10xx.h8783 #define TIM_CR2_MMS2_Pos (20U) macro
8784 #define TIM_CR2_MMS2_Msk (0xFUL << TIM_CR2_MMS2_Pos) /*!< 0x00F00000 */
8786 #define TIM_CR2_MMS2_0 (0x1U << TIM_CR2_MMS2_Pos) /*!< 0x00100000 */
8787 #define TIM_CR2_MMS2_1 (0x2U << TIM_CR2_MMS2_Pos) /*!< 0x00200000 */
8788 #define TIM_CR2_MMS2_2 (0x4U << TIM_CR2_MMS2_Pos) /*!< 0x00400000 */
8789 #define TIM_CR2_MMS2_3 (0x8U << TIM_CR2_MMS2_Pos) /*!< 0x00800000 */
Dstm32wb15xx.h8955 #define TIM_CR2_MMS2_Pos (20U) macro
8956 #define TIM_CR2_MMS2_Msk (0xFUL << TIM_CR2_MMS2_Pos) /*!< 0x00F00000 */
8958 #define TIM_CR2_MMS2_0 (0x1U << TIM_CR2_MMS2_Pos) /*!< 0x00100000 */
8959 #define TIM_CR2_MMS2_1 (0x2U << TIM_CR2_MMS2_Pos) /*!< 0x00200000 */
8960 #define TIM_CR2_MMS2_2 (0x4U << TIM_CR2_MMS2_Pos) /*!< 0x00400000 */
8961 #define TIM_CR2_MMS2_3 (0x8U << TIM_CR2_MMS2_Pos) /*!< 0x00800000 */

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