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Searched refs:SPI_CR2_NSSP_Pos (Results 1 – 25 of 119) sorted by relevance

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/hal_stm32-latest/stm32cube/stm32f0xx/soc/
Dstm32f030x6.h3812 #define SPI_CR2_NSSP_Pos (3U) macro
3813 #define SPI_CR2_NSSP_Msk (0x1UL << SPI_CR2_NSSP_Pos) /*!< 0x00000008 */
Dstm32f030x8.h3856 #define SPI_CR2_NSSP_Pos (3U) macro
3857 #define SPI_CR2_NSSP_Msk (0x1UL << SPI_CR2_NSSP_Pos) /*!< 0x00000008 */
Dstm32f070x6.h3892 #define SPI_CR2_NSSP_Pos (3U) macro
3893 #define SPI_CR2_NSSP_Msk (0x1UL << SPI_CR2_NSSP_Pos) /*!< 0x00000008 */
Dstm32f031x6.h3967 #define SPI_CR2_NSSP_Pos (3U) macro
3968 #define SPI_CR2_NSSP_Msk (0x1UL << SPI_CR2_NSSP_Pos) /*!< 0x00000008 */
Dstm32f030xc.h4182 #define SPI_CR2_NSSP_Pos (3U) macro
4183 #define SPI_CR2_NSSP_Msk (0x1UL << SPI_CR2_NSSP_Pos) /*!< 0x00000008 */
Dstm32f038xx.h3939 #define SPI_CR2_NSSP_Pos (3U) macro
3940 #define SPI_CR2_NSSP_Msk (0x1UL << SPI_CR2_NSSP_Pos) /*!< 0x00000008 */
Dstm32f070xb.h4050 #define SPI_CR2_NSSP_Pos (3U) macro
4051 #define SPI_CR2_NSSP_Msk (0x1UL << SPI_CR2_NSSP_Pos) /*!< 0x00000008 */
Dstm32f058xx.h4439 #define SPI_CR2_NSSP_Pos (3U) macro
4440 #define SPI_CR2_NSSP_Msk (0x1UL << SPI_CR2_NSSP_Pos) /*!< 0x00000008 */
Dstm32f051x8.h4467 #define SPI_CR2_NSSP_Pos (3U) macro
4468 #define SPI_CR2_NSSP_Msk (0x1UL << SPI_CR2_NSSP_Pos) /*!< 0x00000008 */
Dstm32f071xb.h4977 #define SPI_CR2_NSSP_Pos (3U) macro
4978 #define SPI_CR2_NSSP_Msk (0x1UL << SPI_CR2_NSSP_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32c0xx/soc/
Dstm32c011xx.h4783 #define SPI_CR2_NSSP_Pos (3U) macro
4784 #define SPI_CR2_NSSP_Msk (0x1UL << SPI_CR2_NSSP_Pos) /*!< 0x00000008 */
Dstm32c031xx.h4946 #define SPI_CR2_NSSP_Pos (3U) macro
4947 #define SPI_CR2_NSSP_Msk (0x1UL << SPI_CR2_NSSP_Pos) /*!< 0x00000008 */
Dstm32c071xx.h5433 #define SPI_CR2_NSSP_Pos (3U) macro
5434 #define SPI_CR2_NSSP_Msk (0x1UL << SPI_CR2_NSSP_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32g0xx/soc/
Dstm32g030xx.h5371 #define SPI_CR2_NSSP_Pos (3U) macro
5372 #define SPI_CR2_NSSP_Msk (0x1UL << SPI_CR2_NSSP_Pos) /*!< 0x00000008 */
Dstm32g050xx.h5417 #define SPI_CR2_NSSP_Pos (3U) macro
5418 #define SPI_CR2_NSSP_Msk (0x1UL << SPI_CR2_NSSP_Pos) /*!< 0x00000008 */
Dstm32g070xx.h5569 #define SPI_CR2_NSSP_Pos (3U) macro
5570 #define SPI_CR2_NSSP_Msk (0x1UL << SPI_CR2_NSSP_Pos) /*!< 0x00000008 */
Dstm32g031xx.h5617 #define SPI_CR2_NSSP_Pos (3U) macro
5618 #define SPI_CR2_NSSP_Msk (0x1UL << SPI_CR2_NSSP_Pos) /*!< 0x00000008 */
Dstm32g041xx.h5915 #define SPI_CR2_NSSP_Pos (3U) macro
5916 #define SPI_CR2_NSSP_Msk (0x1UL << SPI_CR2_NSSP_Pos) /*!< 0x00000008 */
Dstm32g051xx.h5992 #define SPI_CR2_NSSP_Pos (3U) macro
5993 #define SPI_CR2_NSSP_Msk (0x1UL << SPI_CR2_NSSP_Pos) /*!< 0x00000008 */
Dstm32g061xx.h6290 #define SPI_CR2_NSSP_Pos (3U) macro
6291 #define SPI_CR2_NSSP_Msk (0x1UL << SPI_CR2_NSSP_Pos) /*!< 0x00000008 */
Dstm32g071xx.h6380 #define SPI_CR2_NSSP_Pos (3U) macro
6381 #define SPI_CR2_NSSP_Msk (0x1UL << SPI_CR2_NSSP_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32f3xx/soc/
Dstm32f301x8.h6098 #define SPI_CR2_NSSP_Pos (3U) macro
6099 #define SPI_CR2_NSSP_Msk (0x1UL << SPI_CR2_NSSP_Pos) /*!< 0x00000008 */
Dstm32f318xx.h6088 #define SPI_CR2_NSSP_Pos (3U) macro
6089 #define SPI_CR2_NSSP_Msk (0x1UL << SPI_CR2_NSSP_Pos) /*!< 0x00000008 */
/hal_stm32-latest/stm32cube/stm32wlxx/soc/
Dstm32wle4xx.h7393 #define SPI_CR2_NSSP_Pos (3U) macro
7394 #define SPI_CR2_NSSP_Msk (0x1UL << SPI_CR2_NSSP_Pos) /*!< 0x00000008 */
Dstm32wle5xx.h7393 #define SPI_CR2_NSSP_Pos (3U) macro
7394 #define SPI_CR2_NSSP_Msk (0x1UL << SPI_CR2_NSSP_Pos) /*!< 0x00000008 */

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